From patchwork Thu Mar 26 06:48:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Mannam X-Patchwork-Id: 11459371 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16EF113A4 for ; Thu, 26 Mar 2020 06:49:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EA9C2207FC for ; Thu, 26 Mar 2020 06:49:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="eOzaFwpa" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727882AbgCZGtu (ORCPT ); Thu, 26 Mar 2020 02:49:50 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:34839 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727872AbgCZGtt (ORCPT ); Thu, 26 Mar 2020 02:49:49 -0400 Received: by mail-wr1-f67.google.com with SMTP id d5so6395439wrn.2 for ; Wed, 25 Mar 2020 23:49:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0idw5B6PcVqWUxIoMkNt7TgZxctDSgOOI59ozY4oTHM=; b=eOzaFwpapO566KIN7o8CtBngABKyDb0NQEUbuybM+vBuUJ6pSDk6ZXtpd0TBG5lVde ptxih3E2lZ1YpIPRurd1aXbCr2bn4XHT3tOHFPBrImMzJVGQbsVkQvVLIW7OHtnTo8fe OvcoHrjVDGAENbGCR2UwXUevVKaeUk//26t/g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0idw5B6PcVqWUxIoMkNt7TgZxctDSgOOI59ozY4oTHM=; b=qb+S/dy2v9mu3OqY2p64zWFY6mSFfcKU3f8AFJq7ByQFSxOnHkN5Tvv/7NbnHNc2T7 6tv7IgOU9SIhhVmBeN0YYqikgCjD7vdbByuAumtIQR3hEEE2UHbS2OjTwcpewtUfX1uB ahXXQjqOFBTtVxVp1E7UHmfp4nCLi3xDe8FFU74KShqpzsPqwXb1iXO4qQg37RwNqVJt +POuWHvgahMR8nlAbu+jSBZNF/M9VWfmwq2tU8O0uqrZZiBm1ntaBfxC1fC6ggGQQxas d5l6CMw/hYSBP9ZpkUWUaKzGTRZLSawyWtZZIvWZylhZI2vVkV0IySQiZGKcbr7VzCCn MuLQ== X-Gm-Message-State: ANhLgQ06AjjRuis27oOLaiLD7M4/qiFaXjh42aXXk0K5ehdWRFlnR/tB LkgWl0rL9WuZIoDZ626RbzjWfQ== X-Google-Smtp-Source: ADFU+vsQTR/kVV+uSwHzxwJhKiVFKKuIbCfDf2JW2zqZaGt6ru+SMQ31s/bTu6v99Ao07jypy+Wdrw== X-Received: by 2002:adf:efc9:: with SMTP id i9mr7182823wrp.23.1585205387945; Wed, 25 Mar 2020 23:49:47 -0700 (PDT) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id v21sm2069137wmj.8.2020.03.25.23.49.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 25 Mar 2020 23:49:47 -0700 (PDT) From: Srinath Mannam To: Lorenzo Pieralisi , Bjorn Helgaas , Florian Fainelli , Ray Jui , Rob Herring , Andrew Murray , Mark Rutland , Andy Shevchenko , Arnd Bergmann Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Ray Jui , Srinath Mannam Subject: [PATCH v5 6/6] arm64: dts: Change PCIe INTx mapping for NS2 Date: Thu, 26 Mar 2020 12:18:46 +0530 Message-Id: <1585205326-25326-7-git-send-email-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1585205326-25326-1-git-send-email-srinath.mannam@broadcom.com> References: <1585205326-25326-1-git-send-email-srinath.mannam@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Ray Jui Change the PCIe INTx mapping to model the 4 INTx interrupts in the IRQ domain of the iProc PCIe controller itself. Signed-off-by: Ray Jui Signed-off-by: Srinath Mannam --- arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 28 ++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi index 15f7b0e..489bfd5 100644 --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi @@ -117,8 +117,11 @@ dma-coherent; #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie0_intc 0>, + <0 0 0 2 &pcie0_intc 1>, + <0 0 0 3 &pcie0_intc 2>, + <0 0 0 4 &pcie0_intc 3>; linux,pci-domain = <0>; @@ -140,6 +143,13 @@ phy-names = "pcie-phy"; msi-parent = <&v2m0>; + pcie0_intc: interrupt-controller { + compatible = "brcm,iproc-intc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; }; pcie4: pcie@50020000 { @@ -148,8 +158,11 @@ dma-coherent; #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie4_intc 0>, + <0 0 0 2 &pcie4_intc 1>, + <0 0 0 3 &pcie4_intc 2>, + <0 0 0 4 &pcie4_intc 3>; linux,pci-domain = <4>; @@ -171,6 +184,13 @@ phy-names = "pcie-phy"; msi-parent = <&v2m0>; + pcie4_intc: interrupt-controller { + compatible = "brcm,iproc-intc"; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = ; + }; }; pcie8: pcie@60c00000 {