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[RFC,2/2] PCI: imx6: Support more than Gen2 speed link mode

Message ID 1652866528-13220-2-git-send-email-hongxing.zhu@nxp.com (mailing list archive)
State New
Headers show
Series [RFC,1/2] PCI: imx6: Make sure the DBI register can be changed | expand

Commit Message

Hongxing Zhu May 18, 2022, 9:35 a.m. UTC
Support more than Gen2 speed link mode, since i.MX8MP PCIe supports up
to Gen3 link speed.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 30641d2dda14..37012f9a33a0 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -809,8 +809,8 @@  static int imx6_pcie_start_link(struct dw_pcie *pci)
 
 	dw_pcie_wait_for_link(pci);
 
-	if (pci->link_gen == 2) {
-		/* Allow Gen2 mode after the link is up. */
+	if (pci->link_gen > 1) {
+		/* Allow faster modes after the link is up. */
 		dw_pcie_dbi_ro_wr_en(pci);
 		tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
 		tmp &= ~PCI_EXP_LNKCAP_SLS;