From patchwork Mon Oct 12 14:24:30 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthew Wilcox X-Patchwork-Id: 53137 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n9CEed8Z028272 for ; Mon, 12 Oct 2009 14:40:39 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932279AbZJLOZL (ORCPT ); Mon, 12 Oct 2009 10:25:11 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S932277AbZJLOZL (ORCPT ); Mon, 12 Oct 2009 10:25:11 -0400 Received: from palinux.external.hp.com ([192.25.206.14]:38048 "EHLO mail.parisc-linux.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932238AbZJLOZJ (ORCPT ); Mon, 12 Oct 2009 10:25:09 -0400 Received: by mail.parisc-linux.org (Postfix, from userid 26919) id 062BE494003; Mon, 12 Oct 2009 08:24:30 -0600 (MDT) Date: Mon, 12 Oct 2009 08:24:30 -0600 From: Matthew Wilcox To: Brad Spengler Cc: Yinghai Lu , Jesse Barnes , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ingo Molnar , "H. Peter Anvin" , linux-ia64@vger.kernel.org Subject: [PATCH] ia64: Don't call SAL < 3.2 for extended config space Message-ID: <20091012142430.GE7545@parisc-linux.org> References: <20091011074531.GA12357@grsecurity.net> <4AD1AE0D.1030007@kernel.org> <4AD24766.7050205@kernel.org> <20091011213245.GC18513@grsecurity.net> <20091011231039.GB7545@parisc-linux.org> <20091012135628.GA310@grsecurity.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20091012135628.GA310@grsecurity.net> User-Agent: Mutt/1.5.18 (2008-05-17) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 7de76dd..61363cc 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -56,10 +56,13 @@ int raw_pci_read(unsigned int seg, unsigned int bus, unsigned int devfn, if ((seg | reg) <= 255) { addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); mode = 0; - } else { + } else if (sal_revision >= SAL_VERSION_CODE(3,2)) addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); mode = 1; + } else { + return -EINVAL; } + result = ia64_sal_pci_config_read(addr, mode, len, &data); if (result != 0) return -EINVAL; @@ -80,9 +83,11 @@ int raw_pci_write(unsigned int seg, unsigned int bus, unsigned int devfn, if ((seg | reg) <= 255) { addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); mode = 0; - } else { + } else if (sal_revision >= SAL_VERSION_CODE(3,2)) addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); mode = 1; + } else { + return -EINVAL; } result = ia64_sal_pci_config_write(addr, mode, len, value); if (result != 0)