From patchwork Fri Jan 15 23:32:58 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Myron Stowe X-Patchwork-Id: 73250 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o0FNX0F1015497 for ; Fri, 15 Jan 2010 23:33:01 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932370Ab0AOXdA (ORCPT ); Fri, 15 Jan 2010 18:33:00 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S932379Ab0AOXdA (ORCPT ); Fri, 15 Jan 2010 18:33:00 -0500 Received: from g6t0185.atlanta.hp.com ([15.193.32.62]:23977 "EHLO g6t0185.atlanta.hp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932370Ab0AOXc7 (ORCPT ); Fri, 15 Jan 2010 18:32:59 -0500 Received: from g5t0030.atlanta.hp.com (g5t0030.atlanta.hp.com [16.228.8.142]) by g6t0185.atlanta.hp.com (Postfix) with ESMTP id DAB44243BE; Fri, 15 Jan 2010 23:32:58 +0000 (UTC) Received: from ldl (ldl.fc.hp.com [15.11.146.30]) by g5t0030.atlanta.hp.com (Postfix) with ESMTP id 96969140CB; Fri, 15 Jan 2010 23:32:58 +0000 (UTC) Received: from localhost (ldl.fc.hp.com [127.0.0.1]) by ldl (Postfix) with ESMTP id 758FBCF000A; Fri, 15 Jan 2010 16:32:58 -0700 (MST) Received: from ldl ([127.0.0.1]) by localhost (ldl.fc.hp.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2EVkiBruTkcv; Fri, 15 Jan 2010 16:32:58 -0700 (MST) Received: from eh.fc.hp.com (eh.fc.hp.com [15.11.146.105]) by ldl (Postfix) with ESMTP id 603D4CF0008; Fri, 15 Jan 2010 16:32:58 -0700 (MST) Received: from bob.kio (localhost [127.0.0.1]) by eh.fc.hp.com (Postfix) with ESMTP id 4AABC261DC; Fri, 15 Jan 2010 16:32:58 -0700 (MST) Subject: [PATCH 2/2] PCI: Add checking to register reads To: jbarnes@virtuousgeek.org From: Myron Stowe Cc: linux-pci@vger.kernel.org, yinghai@kernel.org Date: Fri, 15 Jan 2010 16:32:58 -0700 Message-ID: <20100115233258.7701.5054.stgit@bob.kio> In-Reply-To: <20100115233253.7701.12499.stgit@bob.kio> References: <20100115233253.7701.12499.stgit@bob.kio> User-Agent: StGit/0.15 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org diff --git a/arch/x86/pci/intel_bus.c b/arch/x86/pci/intel_bus.c index 8be4e1d..07d773d 100644 --- a/arch/x86/pci/intel_bus.c +++ b/arch/x86/pci/intel_bus.c @@ -46,40 +46,37 @@ static void __devinit pci_root_bus_res(struct pci_dev *dev) { u16 word; u32 dword; - struct pci_root_info *info; + struct pci_root_info tmp, *info = &tmp; u16 io_base, io_end; u32 mmiol_base, mmiol_end, vtbar; u64 mmioh_base, mmioh_end; int bus_base, bus_end; - /* some sys doesn't get mmconf enabled */ - if (dev->cfg_size < 0x120) - return; - if (pci_root_num >= PCI_ROOT_NR) { printk(KERN_DEBUG "intel_bus.c: PCI_ROOT_NR is too small\n"); return; } - info = &pci_root_info[pci_root_num]; - pci_root_num++; - - pci_read_config_word(dev, IOH_LCFGBUS, &word); + if (pci_read_config_word(dev, IOH_LCFGBUS, &word)) + return; bus_base = (word & 0xff); bus_end = (word & 0xff00) >> 8; sprintf(info->name, "PCI Bus #%02x", bus_base); info->bus_min = bus_base; info->bus_max = bus_end; - pci_read_config_word(dev, IOH_LIO, &word); + if (pci_read_config_word(dev, IOH_LIO, &word)) + return; io_base = (word & 0xf0) << (12 - 4); io_end = (word & 0xf000) | 0xfff; update_res(info, io_base, io_end, IORESOURCE_IO, 0); - pci_read_config_dword(dev, IOH_LMMIOL, &dword); + if (pci_read_config_dword(dev, IOH_LMMIOL, &dword)) + return; mmiol_base = (dword & 0xff00) << (24 - 8); mmiol_end = (dword & 0xff000000) | 0xffffff; - pci_read_config_dword(dev, IOH_VTBAR, &dword); + if (pci_read_config_dword(dev, IOH_VTBAR, &dword)) + return; vtbar = dword & 0xfffffffe; if (dword & 0x1 && (mmiol_base < vtbar + IOH_VTSIZE - 1 && vtbar < mmiol_end)) { @@ -96,15 +93,19 @@ static void __devinit pci_root_bus_res(struct pci_dev *dev) } update_res(info, mmiol_base, mmiol_end, IORESOURCE_MEM, 0); - pci_read_config_dword(dev, IOH_LMMIOH, &dword); + if (pci_read_config_dword(dev, IOH_LMMIOH, &dword)) + return; mmioh_base = ((u64)(dword & 0xfc00)) << (26 - 10); mmioh_end = ((u64)(dword & 0xfc000000) | 0x3ffffff); - pci_read_config_dword(dev, IOH_LMMIOH_BASEU, &dword); + if (pci_read_config_dword(dev, IOH_LMMIOH_BASEU, &dword)) + return; mmioh_base |= ((u64)(dword & 0x7ffff)) << 32; - pci_read_config_dword(dev, IOH_LMMIOH_LIMITU, &dword); + if (pci_read_config_dword(dev, IOH_LMMIOH_LIMITU, &dword)) + return; mmioh_end |= ((u64)(dword & 0x7ffff)) << 32; update_res(info, mmioh_base, mmioh_end, IORESOURCE_MEM, 0); + pci_root_info[pci_root_num++] = *info; print_ioh_resources(info); }