From patchwork Mon May 9 19:03:27 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 770202 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter2.kernel.org (8.14.4/8.14.3) with ESMTP id p49JAH20000999 for ; Mon, 9 May 2011 19:10:17 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753504Ab1EITKQ (ORCPT ); Mon, 9 May 2011 15:10:16 -0400 Received: from oproxy8-pub.bluehost.com ([69.89.22.20]:54563 "HELO oproxy8-pub.bluehost.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1751933Ab1EITKP (ORCPT ); Mon, 9 May 2011 15:10:15 -0400 X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Mon, 09 May 2011 19:10:17 +0000 (UTC) X-Greylist: delayed 400 seconds by postgrey-1.27 at vger.kernel.org; Mon, 09 May 2011 15:10:15 EDT Received: (qmail 26155 invoked by uid 0); 9 May 2011 19:03:35 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy2.bluehost.com with SMTP; 9 May 2011 19:03:35 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=virtuousgeek.org; h=Received:Date:From:To:Subject:Message-ID:X-Mailer:Mime-Version:Content-Type:Content-Transfer-Encoding:X-Identified-User; b=FLO8ebOR+RK6h8c2A62AhpFHKCXrug4Fg75x9P412OXUrXnqaRfj5Q3FD8h/XNpMoqmS2PA1njZZ/+bCWd9e+nt/n4Il5+z6b5YporRw4oxWSqEFNNj2Bn9HvmV/+nSU; Received: from c-67-161-37-189.hsd1.ca.comcast.net ([67.161.37.189] helo=jbarnes-desktop) by box514.bluehost.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.69) (envelope-from ) id 1QJVjz-0003mG-75; Mon, 09 May 2011 13:03:35 -0600 Date: Mon, 9 May 2011 12:03:27 -0700 From: Jesse Barnes To: Martin Mares , Linux-PCI Mailing List Subject: [PATCH] pciutils: TPH and LTR capability reporting Message-ID: <20110509120327.68e0d7ff@jbarnes-desktop> X-Mailer: Claws Mail 3.7.6 (GTK+ 2.22.0; x86_64-pc-linux-gnu) Mime-Version: 1.0 X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.161.37.189 authed with jbarnes@virtuousgeek.org} Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Report information about transaction processing hints and latency tolerance reporting capabilities, if present. --- lib/header.h | 20 ++++++++++++++ ls-ecaps.c | 84 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 104 insertions(+), 0 deletions(-) diff --git a/lib/header.h b/lib/header.h index 5d285c2..d481f27 100644 --- a/lib/header.h +++ b/lib/header.h @@ -223,6 +223,8 @@ #define PCI_EXT_CAP_ID_ARI 0x0e /* Alternative Routing-ID Interpretation */ #define PCI_EXT_CAP_ID_ATS 0x0f /* Address Translation Service */ #define PCI_EXT_CAP_ID_SRIOV 0x10 /* Single Root I/O Virtualization */ +#define PCI_EXT_CAP_ID_TPH 0x17 /* Transaction processing hints */ +#define PCI_EXT_CAP_ID_LTR 0x18 /* Latency Tolerance Reporting */ /*** Definitions of capabilities ***/ @@ -1028,6 +1030,24 @@ #define PCI_IOV_MSA_BIR(x) ((x) & 7) /* VF Migration State BIR */ #define PCI_IOV_MSA_OFFSET(x) ((x) & 0xfffffff8) /* VF Migration State Offset */ +/* Transaction Processing Hints */ +#define PCI_TPH_CAPABILITIES 4 +#define PCI_TPH_INTVEC_SUP (1<<1) /* Supports interrupt vector mode */ +#define PCI_TPH_DEV_SUP (1<<2) /* Device specific mode supported */ +#define PCI_TPH_EXT_REQ_SUP (1<<8) /* Supports extended requests */ +#define PCI_TPH_ST_LOC_MASK (3<<9) /* Steering table location bits */ +#define PCI_TPH_ST_NONE (0<<9) /* No steering table */ +#define PCI_TPH_ST_CAP (1<<9) /* Steering table in TPH cap */ +#define PCI_TPH_ST_MSIX (2<<9) /* Steering table in MSI-X table */ +#define PCI_TPH_ST_SIZE_SHIFT (16) /* Encoded as size - 1 */ + +/* Latency Tolerance Reporting */ +#define PCI_LTR_MAX_SNOOP 4 /* 16 bit value */ +#define PCI_LTR_VALUE_MASK (0x3ff) +#define PCI_LTR_SCALE_SHIFT (10) +#define PCI_LTR_SCALE_MASK (7) +#define PCI_LTR_MAX_NOSNOOP 6 /* 16 bit value */ + /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded diff --git a/ls-ecaps.c b/ls-ecaps.c index ed10f72..6e58fb0 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -12,6 +12,84 @@ #include "lspci.h" static void +cap_tph(struct device *d, int where) +{ + u32 tph_cap; + printf("Transaction Processing Hints\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where + PCI_TPH_CAPABILITIES, 4)) + return; + + tph_cap = get_conf_long(d, where + PCI_TPH_CAPABILITIES); + + if (tph_cap & PCI_TPH_INTVEC_SUP) + printf("\t\tInterrupt vector mode supported\n"); + if (tph_cap & PCI_TPH_DEV_SUP) + printf("\t\tDevice specific mode supported\n"); + if (tph_cap & PCI_TPH_EXT_REQ_SUP) + printf("\t\tExtended requester support\n"); + + switch (tph_cap & PCI_TPH_ST_LOC_MASK) { + case PCI_TPH_ST_NONE: + printf("\t\tNo steering table available\n"); + break; + case PCI_TPH_ST_CAP: + printf("\t\tSteering table in TPH capability structure\n"); + break; + case PCI_TPH_ST_MSIX: + printf("\t\tSteering table in MSI-X table\n"); + break; + default: + printf("\t\tReserved steering table location\n"); + break; + } +} + +static u32 +cap_ltr_scale(u8 scale) +{ + return 1 << (scale * 5); +} + +static void +cap_ltr(struct device *d, int where) +{ + u32 scale; + u16 snoop, nosnoop; + printf("Latency Tolerance Reporting\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where + PCI_LTR_MAX_SNOOP, 4)) + return; + + snoop = get_conf_word(d, where + PCI_LTR_MAX_SNOOP); + scale = cap_ltr_scale((snoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK); + printf("\t\tMax snoop latency: %lldns\n", + ((unsigned long long)snoop & PCI_LTR_VALUE_MASK) * scale); + + nosnoop = get_conf_word(d, where + PCI_LTR_MAX_NOSNOOP); + scale = cap_ltr_scale((nosnoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK); + printf("\t\tMax no snoop latency: %lldns\n", + ((unsigned long long)nosnoop & PCI_LTR_VALUE_MASK) * scale); +} + +static void cap_dsn(struct device *d, int where) { u32 t1, t2; @@ -455,6 +533,12 @@ show_ext_caps(struct device *d) case PCI_EXT_CAP_ID_SRIOV: cap_sriov(d, where); break; + case PCI_EXT_CAP_ID_TPH: + cap_tph(d, where); + break; + case PCI_EXT_CAP_ID_LTR: + cap_ltr(d, where); + break; default: printf("#%02x\n", id); break;