From patchwork Thu Aug 23 05:09:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ram Pai X-Patchwork-Id: 1364411 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id D914DDF2AB for ; Thu, 23 Aug 2012 05:10:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751298Ab2HWFKH (ORCPT ); Thu, 23 Aug 2012 01:10:07 -0400 Received: from e3.ny.us.ibm.com ([32.97.182.143]:60451 "EHLO e3.ny.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751052Ab2HWFKF (ORCPT ); Thu, 23 Aug 2012 01:10:05 -0400 Received: from /spool/local by e3.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 23 Aug 2012 01:10:03 -0400 Received: from d01relay07.pok.ibm.com (d01relay07.pok.ibm.com [9.56.227.147]) by d01dlp02.pok.ibm.com (Postfix) with ESMTP id 2609D6E8039 for ; Thu, 23 Aug 2012 01:10:03 -0400 (EDT) Received: from d01av03.pok.ibm.com (d01av03.pok.ibm.com [9.56.224.217]) by d01relay07.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id q7N5A2vR38207620 for ; Thu, 23 Aug 2012 01:10:02 -0400 Received: from d01av03.pok.ibm.com (loopback [127.0.0.1]) by d01av03.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id q7N5A1wX011911 for ; Thu, 23 Aug 2012 02:10:02 -0300 Received: from us.ibm.com ([9.123.236.98]) by d01av03.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with SMTP id q7N59xqS011722; Thu, 23 Aug 2012 02:09:59 -0300 Received: by us.ibm.com (sSMTP sendmail emulation); Thu, 23 Aug 2012 13:09:58 +0800 Date: Thu, 23 Aug 2012 13:09:58 +0800 From: Ram Pai To: linux-pci@vger.kernel.org Cc: Bjorn Helgaas , Yinghai Lu , linuxram@us.ibm.com Subject: [RFC PATCH v3 ]pci: pci resource iterator Message-ID: <20120823050958.GB2332@ram-ThinkPad-T61> Reply-To: Ram Pai References: <20120816032602.GN2449@ram-ThinkPad-T61> <20120816044104.GQ2449@ram-ThinkPad-T61> <20120821151245.GA2356@ram-ThinkPad-T61> <20120822101533.GA2332@ram-ThinkPad-T61> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-Content-Scanned: Fidelis XPS MAILER x-cbid: 12082305-8974-0000-0000-00000C7AEA92 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org PCI: pci resource iterator Currently pci_dev structure holds an array of 17 PCI resources; six base BARs, one ROM BAR, four BRIDGE BARs, six sriov BARs. This is wasteful. A bridge device just needs the 4 bridge resources. A non-bridge device just needs the six base resources and one ROM resource. The sriov resources are needed only if the device has SRIOV capability. The pci_dev structure needs to be re-organized to avoid unnecessary bloating. However too much code outside the pci-bus driver, assumes the internal details of the pci_dev structure, thus making it hard to re-organize the datastructure. As a first step this patch provides generic methods to access the resource structure of the pci_dev. Next step, change the code in all the drivers that access the resource structure to use the new iterator. Finally we can re-organize the resource structure in the pci_dev structure and correspondingly update the methods. This patch is compile tested only. Changelog v2: Consolidated iterator interface as per Bjorn's suggestion. Changelog v3: ability to get index of the returned resource. Suggested by Yinghai. Incorporates Yinghai's code snippets. Signed-off-by: Ram Pai --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/include/linux/pci.h b/include/linux/pci.h index e444f5b..7101da2 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1351,6 +1351,48 @@ static inline int pci_domain_nr(struct pci_bus *bus) (pci_resource_end((dev), (bar)) - \ pci_resource_start((dev), (bar)) + 1)) +#define PCI_STD_RES (1<<0) +#define PCI_ROM_RES (1<<1) +#define PCI_BRIDGE_RES (1<<2) +#define PCI_IOV_RES (1<<3) +#define PCI_ALL_RES (PCI_STD_RES|PCI_ROM_RES|PCI_BRIDGE_RES|PCI_IOV_RES) +#define PCI_NOSTD_RES (PCI_ALL_RES & ~PCI_STD_RES) +#define PCI_NOIOV_RES (PCI_ALL_RES & ~PCI_IOV_RES) +#define PCI_NOROM_RES (PCI_ALL_RES & ~PCI_ROM_RES) +#define PCI_NOBRIDGE_RES (PCI_ALL_RES & ~PCI_BRIDGE_RES) +#define PCI_STD_ROM_RES (PCI_STD_RES | PCI_ROM_RES) +#define PCI_STD_IOV_RES (PCI_STD_RES | PCI_IOV_RES) +#define PCI_STD_ROM_IOV_RES (PCI_NOBRIDGE_RES) + +static inline struct resource *pci_dev_resource_n(struct pci_dev *dev, int n) +{ + if (n >= 0 && n < PCI_NUM_RESOURCES) + return &dev->resource[n]; + + return NULL; +} + +static inline int pci_next_resource_idx(int i, int flag) +{ + while (++i < PCI_NUM_RESOURCES) { + if ((i >= 0 && i < PCI_ROM_RESOURCE && (flag & PCI_STD_RES)) || + (i == PCI_ROM_RESOURCE && (flag & PCI_ROM_RES)) || +#ifdef CONFIG_PCI_IOV + (i <= PCI_IOV_RESOURCE_END && (flag & PCI_IOV_RES)) || +#endif + (i <= PCI_BRIDGE_RESOURCE_END && (flag & PCI_BRIDGE_RES))) + return i; + } + return -1; +} + +#define for_each_pci_resource(dev, res, flag) \ + for (i = pci_next_resource_idx(-1, flag), \ + res = pci_dev_resource_n(dev, i); \ + res; \ + i = pci_next_resource_idx(i, flag), \ + res = pci_dev_resource_n(dev, i)) + /* Similar to the helpers above, these manipulate per-pci_dev * driver-specific data. They are really just a wrapper around * the generic device structure functions of these calls.