From patchwork Mon Apr 22 23:10:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 2474781 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id B0C1F3FD40 for ; Mon, 22 Apr 2013 23:10:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753346Ab3DVXK3 (ORCPT ); Mon, 22 Apr 2013 19:10:29 -0400 Received: from mail-ie0-f181.google.com ([209.85.223.181]:51504 "EHLO mail-ie0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753039Ab3DVXK2 (ORCPT ); Mon, 22 Apr 2013 19:10:28 -0400 Received: by mail-ie0-f181.google.com with SMTP id tp5so12591ieb.26 for ; Mon, 22 Apr 2013 16:10:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=DkWO1uWRK/+FIFsXQVo+iEwevpCvTzGgoWUEtbjs6lg=; b=JHFUGHo7I08vrkJ4tjZ4KEFxW9dmXxjv0tG4tu75RzPd1q2Kept8gZxjnKIGYcX+Of ByS5j89pV+XSpFww6xC8qXL1WkKD8IraPguJJitA33l/jtU2JR5cbQgvHmprNXujv5oj VEJTNdk5ZRih2OIE2/rFRsgeVpgU+KrW0wzQqwm1bSYA9TM3k+JqlRWfK0iIKo8IH2HZ DIQf7nCZhwB5kL8xoZ9/HFjpJQN9bVf4ShLQmIph3q+jJBVEw0xT3ktW6PBjfVPcm6rS 5DeDk6g3ceC7a50FL/i1tBA+5yv3sQUSj4QYZI2mCUX04xrTZqu6ifdYFZ8i4xvYRRxr orZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding:x-gm-message-state; bh=DkWO1uWRK/+FIFsXQVo+iEwevpCvTzGgoWUEtbjs6lg=; b=UuhKLlgb9VHNUU+M4KhdYNv4x/L9095mAuvDUsbbwAAnICJ8r8EdfBjDD20YbJQWrW csoknqjLCi+URkPCOx1QWa6OZrb4NJa4ep47rVdgCKVxg+HcL+PVDvRv+2mjSQaZq+6Z o/rSa+U6fAvebF+pRd/H0CPq7PVUwpNjC4u7ugJZvE5Ib7JHa5ny7g/7qlQOyZ1X1qnr HR+pgGvbLuwN8EWT1s7gjKG53h5Ue/3S5bhQcTzkN0xOn19XligAa+zt+L4v0G4tj5U2 62MrWtHIfEUqCVwJEwVSOwf+E0YCWBfR1o2eEQWEVFshwxMAGY/YIT+WwX13BPFVDeJv ds7g== X-Received: by 10.50.164.230 with SMTP id yt6mr1625511igb.64.1366672228083; Mon, 22 Apr 2013 16:10:28 -0700 (PDT) Received: from localhost ([172.29.120.215]) by mx.google.com with ESMTPSA id ua6sm17946283igb.0.2013.04.22.16.10.27 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 22 Apr 2013 16:10:27 -0700 (PDT) Subject: [PATCH v4 02/22] PCI: Use u8, not int, for PM capability offset To: linux-pci@vger.kernel.org From: Bjorn Helgaas Cc: "Rafael J. Wysocki" , Gavin Shan Date: Mon, 22 Apr 2013 17:10:26 -0600 Message-ID: <20130422231026.32621.14207.stgit@bhelgaas-glaptop> In-Reply-To: <20130422230012.32621.15224.stgit@bhelgaas-glaptop> References: <20130422230012.32621.15224.stgit@bhelgaas-glaptop> User-Agent: StGit/0.15 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQmK0qv8863j7bXurOectYe9Gw8VKeopTf7CVA5bUq5eU3EIvllnM8Zp/cqxGtN8pNQrsCVgHflADNLCQzF4KlQbHWH39moFNFi6vB66eZuabWQl7S/eZbTxIFnf2rFYLTUL7idrH5oUcW7y4NN0dT/zeugzVYEcslkVbvLBlr5mDlGx7qjBKeyTdKQ10gRfhUPyMWY1r15bx0ATARVTY05ecoKUEb0jaZP0roQrOq3LkL8i0nA= Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The Power Management Capability (PCI_CAP_ID_PM == 0x01) is defined by PCI and must appear in the 256-byte PCI Configuration Space from 0-0xff. It cannot be in the PCIe Extended Configuration space from 0x100-0xfff, so we only need a u8 to hold its offset. Signed-off-by: Bjorn Helgaas CC: "Rafael J. Wysocki" Acked-by: Rafael J. Wysocki --- include/linux/pci.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/include/linux/pci.h b/include/linux/pci.h index 2461033a..9587d4d 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -249,8 +249,7 @@ struct pci_dev { pci_power_t current_state; /* Current operating state. In ACPI-speak, this is D0-D3, D0 being fully functional, and D3 being off. */ - int pm_cap; /* PM capability offset in the - configuration space */ + u8 pm_cap; /* PM capability offset */ unsigned int pme_support:5; /* Bitmask of states from which PME# can be generated */ unsigned int pme_interrupt:1;