From patchwork Mon Apr 22 23:10:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 2474811 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id CF1063FD40 for ; Mon, 22 Apr 2013 23:10:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753658Ab3DVXKt (ORCPT ); Mon, 22 Apr 2013 19:10:49 -0400 Received: from mail-ia0-f175.google.com ([209.85.210.175]:43962 "EHLO mail-ia0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753629Ab3DVXKt (ORCPT ); Mon, 22 Apr 2013 19:10:49 -0400 Received: by mail-ia0-f175.google.com with SMTP id i38so8482iae.34 for ; Mon, 22 Apr 2013 16:10:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=nUdRV/5j0mDpqcdDuI+VTfFUq43qUSAw7Timx2Of5uM=; b=mpLkBaIKUwG+En23AFZQIT3sc86VVkZKkBASKlrP5o/yBBw97zs1tqZJlFJxS3oEqL fpxOe9S69nxY7ethvpe7OtHzDJ1kGtdHDXM66WhRYhP+yk7OF0nTHsgScRtb7iyRJDkL Kbh82s4g8ti9sLVkzyzqPfX5xwliYrN3taQ4ZgVtKbDzzqRXJbyMnDBt4Y4Mndz5F8bW rbDAo1hkKWw0XdLsPb1X1QmNVsSgX4soVc7rjsOijghx8Gjcuy/ARJxYIZHr+C2/AIzZ zZGg2sdjPoh2CRVdSlgCWuGgQUqxjIEARLa0K6xfJnUOta/OovyjSNJ1klwkFw7Z1ubt zUkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding:x-gm-message-state; bh=nUdRV/5j0mDpqcdDuI+VTfFUq43qUSAw7Timx2Of5uM=; b=CWssaVputfoYzRR14m1MR9riTg1kv5wr0G8XRYaY/2fwo2kSIsjWI4cy13lQ3G9ood IpHEHM0cb4XW6h+gMMy4S6FGeumLIO1730a4phQ7YSYFEbCq1pcxRl5hZgM7WxCq1yGa n67Nbl2ErkejfcAiDGwTdL/3MQ31QDKzc6B6rnrHuN2iuTY8F4KVxATmRh9a4mAzJaWG tCoTuklfi3YjytVxmli4ZATp3ggkJ50i9sHSXHztaWzBAwjoU2S1Be6GMmVxM73c0WXN 6W21WWkaMM8CWD1LvTUqI96DH260c8/ttxgv/SvTzFaU3J8JVHZmb7EU7++op3l/+Bby x4jA== X-Received: by 10.50.140.73 with SMTP id re9mr9274447igb.59.1366672248603; Mon, 22 Apr 2013 16:10:48 -0700 (PDT) Received: from localhost ([172.29.120.215]) by mx.google.com with ESMTPSA id s16sm4732124ign.4.2013.04.22.16.10.47 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 22 Apr 2013 16:10:48 -0700 (PDT) Subject: [PATCH v4 05/22] PCI: Use cached MSI cap while enabling MSI interrupts To: linux-pci@vger.kernel.org From: Bjorn Helgaas Cc: Gavin Shan Date: Mon, 22 Apr 2013 17:10:46 -0600 Message-ID: <20130422231046.32621.65448.stgit@bhelgaas-glaptop> In-Reply-To: <20130422230012.32621.15224.stgit@bhelgaas-glaptop> References: <20130422230012.32621.15224.stgit@bhelgaas-glaptop> User-Agent: StGit/0.15 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlgztjD22GCFwh+zH7VRp/6PXKphrfJWWXAlqYzqcMmeS7AgoRBNYraSPOGs7W39kqhCVGIlz+vQJuPx5s7EX/DhqaS3uwM6XdLXVnLfLnYL7fxH9YSt1JTHAwYT39/qaeMkrDKkF2aDsSzIGpK5kcJZ5IeQVKb9S/C+EVdHeH8ytm8CZ+no7lnHk52ylwFX+Qzy1htlzc5wtF/vbE2w8c4eAc/4/4mEoT/PCpDiDjcWkc0J1A= Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Gavin Shan The patch uses the cached MSI capability offset in pci_dev instead of reading it from config space when enabling MSI interrupts. [bhelgaas: removed unrelated msi_control_reg() changes] Signed-off-by: Gavin Shan Signed-off-by: Bjorn Helgaas --- drivers/pci/msi.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 60a4b10..0138550 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -546,14 +546,13 @@ out_unroll: static int msi_capability_init(struct pci_dev *dev, int nvec) { struct msi_desc *entry; - int pos, ret; + int ret; u16 control; unsigned mask; - pos = pci_find_capability(dev, PCI_CAP_ID_MSI); msi_set_enable(dev, 0); /* Disable MSI during set up */ - pci_read_config_word(dev, msi_control_reg(pos), &control); + pci_read_config_word(dev, msi_control_reg(dev->msi_cap), &control); /* MSI Entry Initialization */ entry = alloc_msi_entry(dev); if (!entry) @@ -564,9 +563,9 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) entry->msi_attrib.entry_nr = 0; entry->msi_attrib.maskbit = is_mask_bit_support(control); entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ - entry->msi_attrib.pos = pos; + entry->msi_attrib.pos = dev->msi_cap; - entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64); + entry->mask_pos = msi_mask_reg(dev->msi_cap, entry->msi_attrib.is_64); /* All MSIs are unmasked by default, Mask them all */ if (entry->msi_attrib.maskbit) pci_read_config_dword(dev, entry->mask_pos, &entry->masked); @@ -807,13 +806,13 @@ static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type) */ int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec) { - int status, pos, maxvec; + int status, maxvec; u16 msgctl; - pos = pci_find_capability(dev, PCI_CAP_ID_MSI); - if (!pos) + if (!dev->msi_cap) return -EINVAL; - pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl); + + pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); if (nvec > maxvec) return maxvec; @@ -838,14 +837,13 @@ EXPORT_SYMBOL(pci_enable_msi_block); int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec) { - int ret, pos, nvec; + int ret, nvec; u16 msgctl; - pos = pci_find_capability(dev, PCI_CAP_ID_MSI); - if (!pos) + if (!dev->msi_cap) return -EINVAL; - pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl); + pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl); ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); if (maxvec)