From patchwork Mon Apr 22 23:11:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 2474831 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id F0DA23FD40 for ; Mon, 22 Apr 2013 23:11:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753688Ab3DVXLE (ORCPT ); Mon, 22 Apr 2013 19:11:04 -0400 Received: from mail-ie0-f169.google.com ([209.85.223.169]:33283 "EHLO mail-ie0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753636Ab3DVXLD (ORCPT ); Mon, 22 Apr 2013 19:11:03 -0400 Received: by mail-ie0-f169.google.com with SMTP id ar20so13179iec.28 for ; Mon, 22 Apr 2013 16:11:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=Dje1ZR5PJeegi013bmHCqw71bJZMghqkp+dO+5K7DWs=; b=Z9uMeLQAKoNb9vgmyLmPJ6Jf389OnzRrJSkXKk6FkL+My+TpJEUEryvPUVngX9Aps+ 09u6+bNGzStvivsTCl42I+EnpEV/bzA2zt6cIq9taJ0HQMSaMLNd7GzRXta2Q06X0Lkd DJk6f9BnYn933mPkZXTIxpMWvtVeY9a8r1QMI73s2prxXV0RDeGyYEMxKqlvYjfU8NWr mQqSSn08VohaBbdzNV42oU+qdTldW6MNnz92OmutP04MYPBpif/o82i7Q+KsDsrTyW7H 3Ps4jGf09W0WjGWcWFQfFUL3DhHAa1F/8Y0GemupZTwl0OMZqzSPH7wHEtwx1oVRVwMX qyMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding:x-gm-message-state; bh=Dje1ZR5PJeegi013bmHCqw71bJZMghqkp+dO+5K7DWs=; b=QOK/JiTHsZbJrjkdUiUtVTPaxkiPQEI5Hqu6T3jxUAYyLUPZDufZkkfJPqHUR9/P0E B4ApsB+Da5TyWir1OjLDjJBqIKNhQsBmLJWMyZBn8R0meQHtI9kACphQP/DwS2ojF2pb DYhzE9qbFKXefew4eaKzqAkZA4cNL4qyCMYagpvEFs3yR9pkcen8idRoi0P/GJLrbSvt 3zNJ1WFuqBjlVHwxfqGhYAwJgt+5Ve8TT2mHS80fXPTh0PlEkPmv7AALT6Z4W1eV72jI M2Om2uLOgS3JCB6z9d8jTlmE9ApewOf1TVd60w+j9L+QRa/1XWBBqygN7akGJeDWazLQ AAYQ== X-Received: by 10.50.15.166 with SMTP id y6mr16858694igc.83.1366672262110; Mon, 22 Apr 2013 16:11:02 -0700 (PDT) Received: from localhost ([172.29.120.215]) by mx.google.com with ESMTPSA id m4sm18458589igd.0.2013.04.22.16.11.01 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 22 Apr 2013 16:11:01 -0700 (PDT) Subject: [PATCH v4 07/22] PCI: Clean up MSI/MSI-X capability #defines To: linux-pci@vger.kernel.org From: Bjorn Helgaas Cc: Gavin Shan Date: Mon, 22 Apr 2013 17:11:00 -0600 Message-ID: <20130422231100.32621.52374.stgit@bhelgaas-glaptop> In-Reply-To: <20130422230012.32621.15224.stgit@bhelgaas-glaptop> References: <20130422230012.32621.15224.stgit@bhelgaas-glaptop> User-Agent: StGit/0.15 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQkr6BPomhROsZcu6wH8xyfQ3+Cyejbf4rkg3WMHWH7QVBJCgxW6Dxa0jmzm57y0W0Mcunxn/gXccBGpiS+94jCbzAZvLHTHj9+KEvMSeQiuXSidT7yZ1Ml5DOmqJU9WCcOi1vgKcpBgQ1KsmHbdwbUrD3VsX0UC6h6z7eJHE/DiMKZFOnG5iemJP8Q7a3zfQatJXmK1r1V6iGMBz0D/7B8J+S3T7zuIr2A6CRTC7Dx0lojpaYM= Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This doesn't change any existing symbols, but it puts them in logical order and uses explicit masks instead of shifts, like the rest of the file. It also adds new symbols for PCI_MSIX_TABLE_BIR, PCI_MSIX_TABLE_OFFSET, PCI_MSIX_PBA_BIR, and PCI_MSIX_PBA_OFFSET to replace the mis-named PCI_MSIX_FLAGS_BIRMASK (the BAR index fields are part of the Table and PBA registers, not the flags register). Signed-off-by: Bjorn Helgaas --- include/uapi/linux/pci_regs.h | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index ebfadc5..864e324 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -292,12 +292,12 @@ /* Message Signalled Interrupts registers */ -#define PCI_MSI_FLAGS 2 /* Various flags */ -#define PCI_MSI_FLAGS_64BIT 0x80 /* 64-bit addresses allowed */ -#define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */ -#define PCI_MSI_FLAGS_QMASK 0x0e /* Maximum queue size available */ -#define PCI_MSI_FLAGS_ENABLE 0x01 /* MSI feature enabled */ -#define PCI_MSI_FLAGS_MASKBIT 0x100 /* 64-bit mask bits allowed */ +#define PCI_MSI_FLAGS 2 /* Message Control */ +#define PCI_MSI_FLAGS_ENABLE 0x0001 /* MSI feature enabled */ +#define PCI_MSI_FLAGS_QMASK 0x000e /* Maximum queue size available */ +#define PCI_MSI_FLAGS_QSIZE 0x0070 /* Message queue size configured */ +#define PCI_MSI_FLAGS_64BIT 0x0080 /* 64-bit addresses allowed */ +#define PCI_MSI_FLAGS_MASKBIT 0x0100 /* Per-vector masking capable */ #define PCI_MSI_RFU 3 /* Rest of capability flags */ #define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */ #define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */ @@ -309,13 +309,17 @@ #define PCI_MSI_PENDING_64 20 /* Pending intrs for 64-bit devices */ /* MSI-X registers */ -#define PCI_MSIX_FLAGS 2 -#define PCI_MSIX_FLAGS_QSIZE 0x7FF -#define PCI_MSIX_FLAGS_ENABLE (1 << 15) -#define PCI_MSIX_FLAGS_MASKALL (1 << 14) -#define PCI_MSIX_TABLE 4 -#define PCI_MSIX_PBA 8 -#define PCI_MSIX_FLAGS_BIRMASK (7 << 0) +#define PCI_MSIX_FLAGS 2 /* Message Control */ +#define PCI_MSIX_FLAGS_QSIZE 0x07FF /* Table size */ +#define PCI_MSIX_FLAGS_MASKALL 0x4000 /* Mask all vectors for this function */ +#define PCI_MSIX_FLAGS_ENABLE 0x8000 /* MSI-X enable */ +#define PCI_MSIX_TABLE 4 /* Table offset */ +#define PCI_MSIX_TABLE_BIR 0x00000007 /* BAR index */ +#define PCI_MSIX_TABLE_OFFSET 0xfffffff8 /* Offset into specified BAR */ +#define PCI_MSIX_PBA 8 /* Pending Bit Array offset */ +#define PCI_MSIX_PBA_BIR 0x00000007 /* BAR index */ +#define PCI_MSIX_PBA_OFFSET 0xfffffff8 /* Offset into specified BAR */ +#define PCI_MSIX_FLAGS_BIRMASK (7 << 0) /* deprecated */ #define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */ /* MSI-X entry's format */