From patchwork Fri Dec 6 00:19:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 3291751 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3EE22C0D4A for ; Fri, 6 Dec 2013 00:19:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6014020503 for ; Fri, 6 Dec 2013 00:19:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7FBB0204EC for ; Fri, 6 Dec 2013 00:19:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753310Ab3LFATv (ORCPT ); Thu, 5 Dec 2013 19:19:51 -0500 Received: from mail-oa0-f51.google.com ([209.85.219.51]:47103 "EHLO mail-oa0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752956Ab3LFATu (ORCPT ); Thu, 5 Dec 2013 19:19:50 -0500 Received: by mail-oa0-f51.google.com with SMTP id i7so19250755oag.38 for ; Thu, 05 Dec 2013 16:19:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=subject:to:from:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; bh=9cUEvcS+5Y7xdMPVhUoezqd+eN/1wCRI7A8nA3jrY1o=; b=mDOOzbCZbjZc6IRt807qZOkLI7madjoqTHv4yOUTM7gkGR3TlglpG1z0UZ9BxbistJ 6X64nqu5wZPUGT114JUyzM9uPFjZ7Zv6G/GnbNo3XkwbMIvmd+xFDGgA8nVuHAvRMvoS m71m+reV7IEvpJ6LWrX669N40WFSLlLAsE/Tg1gOKYUzGWHks+pcsSEBh8KtwlM0d0ZF LoGjlZIlDogMR2oECou6756uFMlSgrQDKKq+OplBb8ztyHnZRdEW3ZNlQFR4jWpgJGoR uS/Sj8bRy6xnDMp2Dzd2x8gK22NbzGFhd4n9U72b0PrHBlSlvJNgmJA0oNCabbq9z+NO gQWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=9cUEvcS+5Y7xdMPVhUoezqd+eN/1wCRI7A8nA3jrY1o=; b=QeRWyUJNG8Qph9SRNvGWDK10i3z/EXpIs4+Gh+m4J3XwEPcJaK9JP6J4pKxqSwy9o3 JGxs/jJrHhMli3kmhTUP1XDOWOk1ieEn6t6maeQawFA7QY7unOPKbEcuTSJQQdzHdIgu +ZBTZrCsXWJVMW7FJT/ifeLVUnpxPmFPmcNlmR4U8cnfyW4wML9TR794TPGwUVpwj4Vb yULeFOZ8u0cFunvDBPTM0dfEk+Wr2hhfnNihiP6KQUKVqyT0l/dSDeAJT33HtmByslwi aNWmjzVqJx22mvzIH46Bonk6z/jnlWVO8xgNJWIItF0+c0pQN28HIJzrxp72Tf/WV3ct Bt8A== X-Gm-Message-State: ALoCoQmTxNjuils6gJeOr11GRfKMHQMD4EiB8RTdTwfI1PynaZOtRTxDYMbvyoX+D5b08Hk+ECyohTgF5Ou95W1LTLnUXqNzQ+PNwqrQBX19CkV7QYH5+x12gMAppO3pghkxS/Yg4QpFu9n1Yr5wCJexRH2p25U9khFYhE3KIbRf8+mgdH8nB2lfWUAdGhL4czGcQVc7MEMKbkfYRICxXxR6t6gVXpiJjz2YCJjzF612XimZcsndGFw= X-Received: by 10.60.63.141 with SMTP id g13mr378418oes.60.1386289189838; Thu, 05 Dec 2013 16:19:49 -0800 (PST) Received: from localhost ([216.160.131.133]) by mx.google.com with ESMTPSA id ru3sm44946976obc.2.2013.12.05.16.19.48 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 05 Dec 2013 16:19:49 -0800 (PST) Subject: [PATCH 1/2] PCI: Prevent bus conflicts while checking for bridge apertures To: linux-pci@vger.kernel.org From: Bjorn Helgaas Cc: Jason Gunthorpe Date: Thu, 05 Dec 2013 17:19:47 -0700 Message-ID: <20131206001947.27659.14981.stgit@bhelgaas-glaptop.roam.corp.google.com> In-Reply-To: <20131206001333.27659.59935.stgit@bhelgaas-glaptop.roam.corp.google.com> References: <20131206001333.27659.59935.stgit@bhelgaas-glaptop.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP pci_bridge_check_ranges() determines whether the bridge supports an I/O aperture and a prefetchable memory aperture. Previously, if the I/O aperture was unsupported, disabled, or configured at [io 0x0000-0x0fff], we wrote 0xf0 to PCI_IO_BASE and PCI_IO_LIMIT, which, if the bridge supports it, enables the I/O aperture at [io 0xf000-0xffff]. The enabled aperture may conflict with other devices in the system. Similarly, we wrote 0xfff0 to PCI_PREF_MEMORY_BASE and PCI_PREF_MEMORY_LIMIT, which enables the prefetchable memory aperture at [mem 0xfff00000-0xffffffff], and that may also conflict with other devices. All we need to know is whether the base and limit registers are writable, so we can use values that leave the apertures disabled, e.g., PCI_IO_BASE = 0xf0, PCI_IO_LIMIT = 0xe0, PCI_PREF_MEMORY_BASE = 0xfff0, PCI_PREF_MEMORY_LIMIT = 0xffe0. Writing non-zero values to both the base and limit registers means we detect whether either or both are writable, as we did before. Reported-by: Jason Gunthorpe Based-on-patch-by: Jason Gunthorpe Signed-off-by: Bjorn Helgaas --- drivers/pci/setup-bus.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 219a4106480a..80350299a6ea 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -665,21 +665,23 @@ static void pci_bridge_check_ranges(struct pci_bus *bus) pci_read_config_word(bridge, PCI_IO_BASE, &io); if (!io) { - pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0); + pci_write_config_word(bridge, PCI_IO_BASE, 0xe0f0); pci_read_config_word(bridge, PCI_IO_BASE, &io); pci_write_config_word(bridge, PCI_IO_BASE, 0x0); } if (io) b_res[0].flags |= IORESOURCE_IO; + /* DECchip 21050 pass 2 errata: the bridge may miss an address disconnect boundary by one PCI data phase. Workaround: do not use prefetching on this device. */ if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001) return; + pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem); if (!pmem) { pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, - 0xfff0fff0); + 0xffe0fff0); pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem); pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0); }