From patchwork Mon Dec 16 01:15:02 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 3351251 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D8F87C0D4A for ; Mon, 16 Dec 2013 01:15:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9408820353 for ; Mon, 16 Dec 2013 01:15:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5340E2034B for ; Mon, 16 Dec 2013 01:15:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751958Ab3LPBPG (ORCPT ); Sun, 15 Dec 2013 20:15:06 -0500 Received: from mail-ie0-f173.google.com ([209.85.223.173]:45699 "EHLO mail-ie0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751908Ab3LPBPF (ORCPT ); Sun, 15 Dec 2013 20:15:05 -0500 Received: by mail-ie0-f173.google.com with SMTP id to1so5681198ieb.18 for ; Sun, 15 Dec 2013 17:15:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=subject:to:from:date:message-id:in-reply-to:references:user-agent :mime-version:content-type:content-transfer-encoding; bh=UsavzTwLgP4vhdc64Yditzw9pnnXHH8u/V0/b/2nUkg=; b=lyi1X+HA3+/+NAIcMXGgKxzoO1NxWiVkBD1oWjJoMkz8VF/rETmYmXImlAeFfmHhTP SdEXhQix95l9D1Yh/BFJ18grDesJnO4/qXhwfhC5AuJWQkZ7KNygCvJxwvyCYx4beY9U PBtyjnpjIhbdMeTDmIBzU9ABEvucosfR5yYRbSseJW3+oxvE9DszBN/bAWnBDiGgtBJF mnACvhiU/0pjSItMVw4qdRqhWWZTYUND79r3PycUPGX57KICzhH+mW15sQfcGI2CqGqC bmUZif5shXPAJyVsCGluzcbZa/BOW3MBamoKmwQyTQ1vyFnKYFNxh08+aXvXlxgViLxG SA5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:from:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=UsavzTwLgP4vhdc64Yditzw9pnnXHH8u/V0/b/2nUkg=; b=PMst/7MJH2I+tKJ6xP+yoccHlHFGkgsQNGn2N8OkwEzKZ+vNy7D7eJOWdT8ynEYMIJ CeAy7pEVHH5Zlm2YJpIXiv2SeBkCpVsdnPiD5Z1lufrL+7kCIq+bibe7SyF+q3ymag70 lqFReUpR9ZGefx7Dvpt2EuG+S8fi0KptsXxhlhiC6jh9vITucdu+E2SCvDsb+GChdAGm zrtXoyzHRWrECcN8cNVBFtRqXmC2d7q7pHOtVhhBqtzeqUhDPt4chBWGjlrAnOy5x+UW Pqc8vb5yxzz0nOTRv82awrxPiiP9+QGNCj8wwjoizG+vc/ZrXT+A8TuqlHELvt7lRBR4 K7xA== X-Gm-Message-State: ALoCoQlF17HLkoRIUN0GKjOKpMUNSn+0ad+edyNMO7B5iIB10ER6yeVmq7t9G+ecdkLrvH2/pqOkE3IPg4Kx2rtfteuWtgx1M2ssmQzLWjNI/mn4KpbyEyx7kJ9WE9cRQL5XJH/gcuJm/W0Eq0dqPXlBbE6cfEFLgTVJ3uNifUDtylX2nEI186RJxxO7FXKiLSEpk0Gpvm2LXBcbihRUNyQGNlDAZihZnsPBjKnftqH6d7/wlDePLGA= X-Received: by 10.50.221.99 with SMTP id qd3mr12817512igc.49.1387156504077; Sun, 15 Dec 2013 17:15:04 -0800 (PST) Received: from localhost (173-8-252-97-Colorado.hfc.comcastbusiness.net. [173.8.252.97]) by mx.google.com with ESMTPSA id nh7sm3571152igb.7.2013.12.15.17.15.03 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sun, 15 Dec 2013 17:15:03 -0800 (PST) Subject: [PATCH 1/8] PCI: pciehp: Drop pciehp_readw()/pciehp_writew() wrappers To: linux-pci@vger.kernel.org From: Bjorn Helgaas Date: Sun, 15 Dec 2013 18:15:02 -0700 Message-ID: <20131216011502.7275.50086.stgit@bhelgaas-glaptop.roam.corp.google.com> In-Reply-To: <20131216010946.7275.83547.stgit@bhelgaas-glaptop.roam.corp.google.com> References: <20131216010946.7275.83547.stgit@bhelgaas-glaptop.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The pciehp_readw() and pciehp_writew() wrappers only look up the pci_dev and call the PCIe Capability accessors, so we can make things a little more straightforward by just using the PCIe Capability accessors directly. No functional change. Signed-off-by: Bjorn Helgaas --- drivers/pci/hotplug/pciehp_hpc.c | 95 +++++++++++++++++++------------------- 1 file changed, 48 insertions(+), 47 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 3eea3fdd4b0b..53bb5501d199 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -41,28 +41,9 @@ #include "../pci.h" #include "pciehp.h" -static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value) +static inline struct pci_dev *ctrl_dev(struct controller *ctrl) { - struct pci_dev *dev = ctrl->pcie->port; - return pcie_capability_read_word(dev, reg, value); -} - -static inline int pciehp_readl(struct controller *ctrl, int reg, u32 *value) -{ - struct pci_dev *dev = ctrl->pcie->port; - return pcie_capability_read_dword(dev, reg, value); -} - -static inline int pciehp_writew(struct controller *ctrl, int reg, u16 value) -{ - struct pci_dev *dev = ctrl->pcie->port; - return pcie_capability_write_word(dev, reg, value); -} - -static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value) -{ - struct pci_dev *dev = ctrl->pcie->port; - return pcie_capability_write_dword(dev, reg, value); + return ctrl->pcie->port; } /* Power Control Command */ @@ -129,20 +110,24 @@ static inline void pciehp_free_irq(struct controller *ctrl) static int pcie_poll_cmd(struct controller *ctrl) { + struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_status; int err, timeout = 1000; - err = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); + err = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); if (!err && (slot_status & PCI_EXP_SLTSTA_CC)) { - pciehp_writew(ctrl, PCI_EXP_SLTSTA, PCI_EXP_SLTSTA_CC); + pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, + PCI_EXP_SLTSTA_CC); return 1; } while (timeout > 0) { msleep(10); timeout -= 10; - err = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); + err = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, + &slot_status); if (!err && (slot_status & PCI_EXP_SLTSTA_CC)) { - pciehp_writew(ctrl, PCI_EXP_SLTSTA, PCI_EXP_SLTSTA_CC); + pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, + PCI_EXP_SLTSTA_CC); return 1; } } @@ -171,13 +156,14 @@ static void pcie_wait_cmd(struct controller *ctrl, int poll) */ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) { + struct pci_dev *pdev = ctrl_dev(ctrl); int retval = 0; u16 slot_status; u16 slot_ctrl; mutex_lock(&ctrl->ctrl_lock); - retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); + retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); if (retval) { ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n", __func__); @@ -207,7 +193,7 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) } } - retval = pciehp_readw(ctrl, PCI_EXP_SLTCTL, &slot_ctrl); + retval = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); if (retval) { ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__); goto out; @@ -217,7 +203,7 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) slot_ctrl |= (cmd & mask); ctrl->cmd_busy = 1; smp_mb(); - retval = pciehp_writew(ctrl, PCI_EXP_SLTCTL, slot_ctrl); + retval = pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl); if (retval) ctrl_err(ctrl, "Cannot write to SLOTCTRL register\n"); @@ -243,10 +229,11 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) static bool check_link_active(struct controller *ctrl) { + struct pci_dev *pdev = ctrl_dev(ctrl); bool ret = false; u16 lnk_status; - if (pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status)) + if (pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status)) return ret; ret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA); @@ -311,6 +298,7 @@ static bool pci_bus_check_dev(struct pci_bus *bus, int devfn) int pciehp_check_link_status(struct controller *ctrl) { + struct pci_dev *pdev = ctrl_dev(ctrl); u16 lnk_status; int retval = 0; bool found = false; @@ -330,7 +318,7 @@ int pciehp_check_link_status(struct controller *ctrl) found = pci_bus_check_dev(ctrl->pcie->port->subordinate, PCI_DEVFN(0, 0)); - retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status); + retval = pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); if (retval) { ctrl_err(ctrl, "Cannot read LNKSTATUS register\n"); return retval; @@ -354,10 +342,11 @@ int pciehp_check_link_status(struct controller *ctrl) static int __pciehp_link_set(struct controller *ctrl, bool enable) { + struct pci_dev *pdev = ctrl_dev(ctrl); u16 lnk_ctrl; int retval = 0; - retval = pciehp_readw(ctrl, PCI_EXP_LNKCTL, &lnk_ctrl); + retval = pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &lnk_ctrl); if (retval) { ctrl_err(ctrl, "Cannot read LNKCTRL register\n"); return retval; @@ -368,7 +357,7 @@ static int __pciehp_link_set(struct controller *ctrl, bool enable) else lnk_ctrl |= PCI_EXP_LNKCTL_LD; - retval = pciehp_writew(ctrl, PCI_EXP_LNKCTL, lnk_ctrl); + retval = pcie_capability_write_word(pdev, PCI_EXP_LNKCTL, lnk_ctrl); if (retval) { ctrl_err(ctrl, "Cannot write LNKCTRL register\n"); return retval; @@ -391,11 +380,12 @@ static int pciehp_link_disable(struct controller *ctrl) int pciehp_get_attention_status(struct slot *slot, u8 *status) { struct controller *ctrl = slot->ctrl; + struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_ctrl; u8 atten_led_state; int retval = 0; - retval = pciehp_readw(ctrl, PCI_EXP_SLTCTL, &slot_ctrl); + retval = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); if (retval) { ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__); return retval; @@ -430,11 +420,12 @@ int pciehp_get_attention_status(struct slot *slot, u8 *status) int pciehp_get_power_status(struct slot *slot, u8 *status) { struct controller *ctrl = slot->ctrl; + struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_ctrl; u8 pwr_state; int retval = 0; - retval = pciehp_readw(ctrl, PCI_EXP_SLTCTL, &slot_ctrl); + retval = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); if (retval) { ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__); return retval; @@ -462,10 +453,11 @@ int pciehp_get_power_status(struct slot *slot, u8 *status) int pciehp_get_latch_status(struct slot *slot, u8 *status) { struct controller *ctrl = slot->ctrl; + struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_status; int retval; - retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); + retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); if (retval) { ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n", __func__); @@ -478,10 +470,11 @@ int pciehp_get_latch_status(struct slot *slot, u8 *status) int pciehp_get_adapter_status(struct slot *slot, u8 *status) { struct controller *ctrl = slot->ctrl; + struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_status; int retval; - retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); + retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); if (retval) { ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n", __func__); @@ -494,10 +487,11 @@ int pciehp_get_adapter_status(struct slot *slot, u8 *status) int pciehp_query_power_fault(struct slot *slot) { struct controller *ctrl = slot->ctrl; + struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_status; int retval; - retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); + retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); if (retval) { ctrl_err(ctrl, "Cannot check for power fault\n"); return retval; @@ -572,13 +566,14 @@ void pciehp_green_led_blink(struct slot *slot) int pciehp_power_on_slot(struct slot * slot) { struct controller *ctrl = slot->ctrl; + struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_cmd; u16 cmd_mask; u16 slot_status; int retval = 0; /* Clear sticky power-fault bit from previous power failures */ - retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); + retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); if (retval) { ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n", __func__); @@ -586,7 +581,7 @@ int pciehp_power_on_slot(struct slot * slot) } slot_status &= PCI_EXP_SLTSTA_PFD; if (slot_status) { - retval = pciehp_writew(ctrl, PCI_EXP_SLTSTA, slot_status); + retval = pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, slot_status); if (retval) { ctrl_err(ctrl, "%s: Cannot write to SLOTSTATUS register\n", @@ -643,6 +638,7 @@ int pciehp_power_off_slot(struct slot * slot) static irqreturn_t pcie_isr(int irq, void *dev_id) { struct controller *ctrl = (struct controller *)dev_id; + struct pci_dev *pdev = ctrl_dev(ctrl); struct slot *slot = ctrl->slot; u16 detected, intr_loc; @@ -653,7 +649,8 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) */ intr_loc = 0; do { - if (pciehp_readw(ctrl, PCI_EXP_SLTSTA, &detected)) { + if (pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, + &detected)) { ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS\n", __func__); return IRQ_NONE; @@ -666,7 +663,9 @@ static irqreturn_t pcie_isr(int irq, void *dev_id) intr_loc |= detected; if (!intr_loc) return IRQ_NONE; - if (detected && pciehp_writew(ctrl, PCI_EXP_SLTSTA, intr_loc)) { + if (detected && + pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, + intr_loc)) { ctrl_err(ctrl, "%s: Cannot write to SLOTSTATUS\n", __func__); return IRQ_NONE; @@ -758,6 +757,7 @@ static void pcie_disable_notification(struct controller *ctrl) int pciehp_reset_slot(struct slot *slot, int probe) { struct controller *ctrl = slot->ctrl; + struct pci_dev *pdev = ctrl_dev(ctrl); if (probe) return 0; @@ -771,7 +771,8 @@ int pciehp_reset_slot(struct slot *slot, int probe) pci_reset_bridge_secondary_bus(ctrl->pcie->port); if (HP_SUPR_RM(ctrl)) { - pciehp_writew(ctrl, PCI_EXP_SLTSTA, PCI_EXP_SLTSTA_PDC); + pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, + PCI_EXP_SLTSTA_PDC); pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PDCE, PCI_EXP_SLTCTL_PDCE); if (pciehp_poll_mode) int_poll_timeout(ctrl->poll_timer.data); @@ -875,9 +876,9 @@ static inline void dbg_ctrl(struct controller *ctrl) EMI(ctrl) ? "yes" : "no"); ctrl_info(ctrl, " Command Completed : %3s\n", NO_CMD_CMPL(ctrl) ? "no" : "yes"); - pciehp_readw(ctrl, PCI_EXP_SLTSTA, ®16); + pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, ®16); ctrl_info(ctrl, "Slot Status : 0x%04x\n", reg16); - pciehp_readw(ctrl, PCI_EXP_SLTCTL, ®16); + pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, ®16); ctrl_info(ctrl, "Slot Control : 0x%04x\n", reg16); } @@ -893,7 +894,7 @@ struct controller *pcie_init(struct pcie_device *dev) goto abort; } ctrl->pcie = dev; - if (pciehp_readl(ctrl, PCI_EXP_SLTCAP, &slot_cap)) { + if (pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap)) { ctrl_err(ctrl, "Cannot read SLOTCAP register\n"); goto abort_ctrl; } @@ -913,7 +914,7 @@ struct controller *pcie_init(struct pcie_device *dev) ctrl->no_cmd_complete = 1; /* Check if Data Link Layer Link Active Reporting is implemented */ - if (pciehp_readl(ctrl, PCI_EXP_LNKCAP, &link_cap)) { + if (pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap)) { ctrl_err(ctrl, "%s: Cannot read LNKCAP register\n", __func__); goto abort_ctrl; } @@ -923,7 +924,7 @@ struct controller *pcie_init(struct pcie_device *dev) } /* Clear all remaining event bits in Slot Status register */ - if (pciehp_writew(ctrl, PCI_EXP_SLTSTA, 0x1f)) + if (pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, 0x1f)) goto abort_ctrl; /* Disable software notification */