From patchwork Thu Apr 17 18:26:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 4010281 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 20D2DBFF02 for ; Thu, 17 Apr 2014 18:26:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0E027202EB for ; Thu, 17 Apr 2014 18:26:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3608120303 for ; Thu, 17 Apr 2014 18:26:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751090AbaDQS0p (ORCPT ); Thu, 17 Apr 2014 14:26:45 -0400 Received: from mail-yh0-f53.google.com ([209.85.213.53]:59193 "EHLO mail-yh0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750918AbaDQS0n (ORCPT ); Thu, 17 Apr 2014 14:26:43 -0400 Received: by mail-yh0-f53.google.com with SMTP id i57so684292yha.26 for ; Thu, 17 Apr 2014 11:26:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=XoQGxK3wB2hW+FoTB8jXTyzPz2JQgr/0fPeizEr5jos=; b=ELUfyaq80oO2kNs3glKl50i0zvcmaIHxy9ZMNHBNzLr8EJ09vzIHK0Sekv9SNASdri c2Q0kMAa5kKyd0l9/QTWMvJ0svxI8jqncg+2iqyOe/d3Yw7H1pyBOA5ITJqKdVcWwjn9 l6xGHG74hth7cP9d3PS1jNtcqBfLsqdDbY65xpn9x/GIfTklZLauU0ouZS/d+9QvyB2E 99mjGJmzaJsKvu/S9jTHsTHsWTNPqtRet3j1phAO+c7NjPEqSNwBia84qzeTvtPjgKZq r2tuBXyNdtAWH17W20TZAu5V7glKv1oVZoT7HQFx/nSfvSRliKlxhIY3amZ+L4IPxCfD XNSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=XoQGxK3wB2hW+FoTB8jXTyzPz2JQgr/0fPeizEr5jos=; b=OqFUV+dyUDpWz+BdHdEF+0tnUbN8xg639dJIGOcLZkd59Zsp1lxSz01Onm6Qvf9Qrn DAksUYGW+yepmvDUFxUtAynwzafu6xgmNWxJbk5ma6/wdb+Lq32iTpGOjocfFUk6yntt kxTdtfWDqRPngQilE6Ia00OY5Sy0o6WzQwqY4M2Ny+i6/r1efNoCzArr1HWGIV7pWcMj nrOFpt+oEfvpnPp8FgTfOYEwYq9QjJkrfvVCZREZ/YYZkOyOBL8X/4IPlUrjgo4PU4XK zP90EausXTaFW68jI4wqowaNrkGSqzqWmjkeQ3eE0Lqji1AuexlrZKqsLs0sqJMd+WJB dxrQ== X-Gm-Message-State: ALoCoQk4zIrh7bPdpMQcmvdHkFasFccU9s0jO84vP8RagJVKGn/oFReuiyVNBqlpF4U9JMOJ8884UPPdfnzG0dvYSR0kP5F0r1/uqImH6XkCKc+cIyvwcgrHJGBig4RbssPcb6tfCjKP2AIf8rwRxRfhYnb5X7PRyvKkw5M+duTHQbNrSTpr52NUcqMA6uebjVM+2JPDsYOiqN0zlMB2DiCMaAVTBnH6aw== X-Received: by 10.236.199.212 with SMTP id x60mr24584246yhn.90.1397759202557; Thu, 17 Apr 2014 11:26:42 -0700 (PDT) Received: from google.com ([100.96.105.228]) by mx.google.com with ESMTPSA id g65sm49417415yhm.28.2014.04.17.11.26.40 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 17 Apr 2014 11:26:41 -0700 (PDT) Date: Thu, 17 Apr 2014 12:26:37 -0600 From: Bjorn Helgaas To: Borislav Petkov Cc: Dave Jones , "Rafael J. Wysocki" , "Zhang, Rui" , "Lu, Aaron" , lkml , "x86@kernel.org" , Linux PCI , ACPI Devel Maling List , Yinghai Lu , "H. Peter Anvin" , Stephane Eranian , "Yan, Zheng Z" Subject: Re: Info: mapping multiple BARs. Your kernel is fine. Message-ID: <20140417182637.GA2098@google.com> References: <20140224162400.GE16457@pd.tnic> <744357E9AAD1214791ACBA4B0B9092630121F201@SHSMSX101.ccr.corp.intel.com> <1558044.S1G2VU7srO@vostro.rjw.lan> <20140416190404.GA7070@pd.tnic> <20140416203138.GA17661@google.com> <20140416223122.GA2767@redhat.com> <20140416225600.GA23781@google.com> <20140417104533.GB8215@pd.tnic> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20140417104533.GB8215@pd.tnic> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Thanks a lot for testing this out and debugging my issues. Here's a new version that looks for both device IDs I know about. I'm still nervous about the modeset problem Dave is seeing. Since the original patch wouldn't find an 8086:0c00 device on Dave's system, it should have done nothing. But since it caused a modesetting problem, there's something else doing on that I don't understand. Bjorn PNP: Work around BIOS defects in Intel MCH area reporting From: Bjorn Helgaas Work around BIOSes that don't report the entire Intel MCH area. MCHBAR is not an architected PCI BAR, so MCH space is usually reported as a PNP0C02 resource. The MCH space was once 16KB, but is 32KB in newer parts. Some BIOSes still report a PNP0C02 resource that is only 16KB, which means the rest of the MCH space is consumed but unreported. This can cause resource map sanity check warnings or (theoretically) a device conflict if we assigned the unreported space to another device. The Intel perf event uncore driver tripped over this when it claimed the MCH region: resource map sanity check conflict: 0xfed10000 0xfed15fff 0xfed10000 0xfed13fff pnp 00:01 Info: mapping multiple BARs. Your kernel is fine. To prevent this, if we find a PNP0C02 resource that covers part of the MCH space, extend it to cover the entire space. Link: http://lkml.kernel.org/r/20140224162400.GE16457@pd.tnic Reported-by: Borislav Petkov Signed-off-by: Bjorn Helgaas Acked-by: Borislav Petkov Tested-by: Borislav Petkov --- drivers/pnp/quirks.c | 74 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c index 258fef272ea7..403bd5c42ed1 100644 --- a/drivers/pnp/quirks.c +++ b/drivers/pnp/quirks.c @@ -334,6 +334,79 @@ static void quirk_amd_mmconfig_area(struct pnp_dev *dev) } #endif +/* Device IDs of parts that have 32KB MCH space */ +static const unsigned int mch_quirk_devices[] = { + 0x0154, /* Ivy Bridge */ + 0x0c00, /* Haswell */ +}; + +static struct pci_dev *get_intel_host(void) +{ + int i; + struct pci_dev *host; + + for (i = 0; i < ARRAY_SIZE(mch_quirk_devices); i++) { + host = pci_get_device(PCI_VENDOR_ID_INTEL, mch_quirk_devices[i], + NULL); + if (host) + return host; + } + return NULL; +} + +static void quirk_intel_mch(struct pnp_dev *dev) +{ + struct pci_dev *host; + u32 addr_lo, addr_hi; + struct pci_bus_region region; + struct resource mch; + struct pnp_resource *pnp_res; + struct resource *res; + + host = get_intel_host(); + if (!host) + return; + + /* + * MCHBAR is not an architected PCI BAR, so MCH space is usually + * reported as a PNP0C02 resource. The MCH space was originally + * 16KB, but is 32KB in newer parts. Some BIOSes still report a + * PNP0C02 resource that is only 16KB, which means the rest of the + * MCH space is consumed but unreported. + */ + + /* + * Read MCHBAR for Host Member Mapped Register Range Base + * https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet + * Sec 3.1.12. + */ + pci_read_config_dword(host, 0x48, &addr_lo); + region.start = addr_lo & ~0x7fff; + pci_read_config_dword(host, 0x4c, &addr_hi); + region.start |= (dma_addr_t) addr_hi << 32; + region.end = region.start + 32*1024 - 1 ; + + memset(&mch, 0, sizeof(mch)); + mch.flags = IORESOURCE_MEM; + pcibios_bus_to_resource(host->bus, &mch, ®ion); + + list_for_each_entry(pnp_res, &dev->resources, list) { + res = &pnp_res->res; + if (res->end < mch.start || res->start > mch.end) + continue; /* no overlap */ + if (res->start == mch.start && res->end == mch.end) + continue; /* exact match */ + + dev_info(&dev->dev, FW_BUG "PNP resource %pR covers only part of %s Intel MCH; extending to %pR\n", + res, pci_name(host), &mch); + res->start = mch.start; + res->end = mch.end; + break; + } + + pci_dev_put(host); +} + /* * PnP Quirks * Cards or devices that need some tweaking due to incomplete resource info @@ -364,6 +437,7 @@ static struct pnp_fixup pnp_fixups[] = { #ifdef CONFIG_AMD_NB {"PNP0c01", quirk_amd_mmconfig_area}, #endif + {"PNP0c02", quirk_intel_mch}, {""} };