From patchwork Tue Apr 29 23:55:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 4089841 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3DC2F9F271 for ; Tue, 29 Apr 2014 23:56:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5859F2021B for ; Tue, 29 Apr 2014 23:56:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C76BB201CE for ; Tue, 29 Apr 2014 23:56:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753221AbaD2X4V (ORCPT ); Tue, 29 Apr 2014 19:56:21 -0400 Received: from mail-ie0-f181.google.com ([209.85.223.181]:57751 "EHLO mail-ie0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755497AbaD2Xzk (ORCPT ); Tue, 29 Apr 2014 19:55:40 -0400 Received: by mail-ie0-f181.google.com with SMTP id y20so1003895ier.26 for ; Tue, 29 Apr 2014 16:55:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=subject:to:from:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; bh=UVokG8j6zbPnqFpvwZJlLEt5lnl4nVVm6AM22x+thdc=; b=GW5HnjjKrq7SX9TWYYeET98+rdzJuitgFzdcYPWvqRGSojV7AWjUmZrtERhzDdzsXH sY3vb9xvyECESaCBoxGjxkvvJNu/mEjz22DZzoa1//fIxJwnh96SqfH5qGOPyKAi9lb2 4FBmuS6o8nIRfSJsrFmDmXdBhrpoq2LyqPe5O8aDaaGgdV4j3+CZdNTtIu4iHoZDurEw 9g52pR1HbR8f1jiPiqoUfLkkIGoAwwGJjb7pQgoFleOfd/MxHzaW0mMOuXfOPXSGVnjB 2yhM5+tIWVVOusJ7PeTrhDB6Tv6mjKNzWKdrtse+BWugHENaAX8/BFhOlNHJXRtkUVfy nzGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=UVokG8j6zbPnqFpvwZJlLEt5lnl4nVVm6AM22x+thdc=; b=kPsLs7m+8LiJJ1ElYnmtnamoEgRkGDQwk7wt0j6rk0DxhFW/F++0uz4ktHI4ySLeTX ErMF9V56+CaAAF65q8npCHCvbCFAnQqn7ktPIk1pT90Hb6w2nkA1Of3yqDD133y4TABw CeVZIKHRY6md2dIZqyBHO7HPAEsxzTFUZlc+BFmr9Dm+Os+tmHRYEP1pw+RZvSh4gzO5 lh6myOapjkf5Bb8zzEktjca/FMipAunTTBrKQEfQBzau9leKW/uKehcANawKVr2UZJEn Q4/tLXu5Vhf5ThkyUwaTiRJPHLsmM5sWbK55cGoebPaCOgcg7QGaZ+vOxQSctYm9c890 ij7Q== X-Gm-Message-State: ALoCoQkis5mvjT9t9P7xs3y6lYZu9GzG8H//bQ60BmTxYKf/lHUAulOH7FQjOy05lUlWwwSjTgv4I5LNpeK6bjHkU5pBysfYX+HBpbl/nHgw+O/dRE/QbeP7h9/fvm4f6Z7A8zaq6HnXs3+oIQeF1U/vGTIj9FdBCh2i5JJ+DZV8BJrjQkoyMSzvCSe0ZAx32ImQjxixqAGi4uJavBqs9rCIUEKkOQoVu4lMgVn9Tv/GJpGumIzscbA= X-Received: by 10.50.49.109 with SMTP id t13mr1145327ign.2.1398815740242; Tue, 29 Apr 2014 16:55:40 -0700 (PDT) Received: from localhost ([172.16.51.53]) by mx.google.com with ESMTPSA id hi8sm479417igb.8.2014.04.29.16.55.39 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 29 Apr 2014 16:55:39 -0700 (PDT) Subject: [PATCH v2 2/2] x86/gart: Tidy messages and add bridge device info To: linux-pci@vger.kernel.org From: Bjorn Helgaas Cc: David Airlie , x86@kernel.org, Ingo Molnar , linux-kernel@vger.kernel.org Date: Tue, 29 Apr 2014 17:55:38 -0600 Message-ID: <20140429235538.11112.41112.stgit@bhelgaas-glaptop.roam.corp.google.com> In-Reply-To: <20140429235015.11112.79459.stgit@bhelgaas-glaptop.roam.corp.google.com> References: <20140429235015.11112.79459.stgit@bhelgaas-glaptop.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Print the AGP bridge info the same way as the rest of the kernel, e.g., "0000:00:04.0" instead of "00:04:00". Also print the AGP aperture address range the same way we print resources, and label it explicitly as a bus address range. No functional change except the message changes. Signed-off-by: Bjorn Helgaas --- arch/x86/kernel/aperture_64.c | 39 ++++++++++++++++++++++----------------- 1 file changed, 22 insertions(+), 17 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c index b11edf2b656d..6e2283423887 100644 --- a/arch/x86/kernel/aperture_64.c +++ b/arch/x86/kernel/aperture_64.c @@ -77,13 +77,13 @@ static u32 __init allocate_aperture(void) addr = memblock_find_in_range(GART_MIN_ADDR, GART_MAX_ADDR, aper_size, aper_size); if (!addr) { - pr_err("Cannot allocate aperture memory hole (%lx,%uK)\n", - addr, aper_size>>10); + pr_err("Cannot allocate aperture memory hole [mem %#010lx-%#010lx] (%uKB)\n", + addr, addr + aper_size - 1, aper_size >> 10); return 0; } memblock_reserve(addr, aper_size); - pr_info("Mapping aperture over %d KB of RAM @ %lx\n", aper_size >> 10, - addr); + pr_info("Mapping aperture over RAM [mem %#010%lx-%#010lx] (%uKB)\n", + addr, addr + aper_size - 1, aper_size >> 10); register_nosave_region(addr >> PAGE_SHIFT, (addr+aper_size) >> PAGE_SHIFT); @@ -127,10 +127,11 @@ static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order) u64 aper; u32 old_order; - pr_info("AGP bridge at %02x:%02x:%02x\n", bus, slot, func); + pr_info("pci 0000:%02x:%02x:%02x: AGP bridge\n", bus, slot, func); apsizereg = read_pci_config_16(bus, slot, func, cap + 0x14); if (apsizereg == 0xffffffff) { - pr_err("APSIZE in AGP bridge unreadable\n"); + pr_err("pci 0000:%02x:%02x.d: APSIZE unreadable\n", + bus, slot, func); return 0; } @@ -154,16 +155,18 @@ static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order) * On some sick chips, APSIZE is 0. It means it wants 4G * so let double check that order, and lets trust AMD NB settings: */ - pr_info("Aperture from AGP @ %Lx old size %u MB\n", - aper, 32 << old_order); + pr_info("pci 0000:%02x:%02x.%d: AGP aperture [bus addr %#010Lx-%#010Lx] (old size %uMB)\n", + bus, slot, func, aper, aper + (32ULL << (old_order + 20)) - 1, + 32 << old_order); if (aper + (32ULL<<(20 + *order)) > 0x100000000ULL) { - pr_info("Aperture size %u MB (APSIZE %x) is not right, using settings from NB\n", - 32 << *order, apsizereg); + pr_info("pci 0000:%02x:%02x.%d: AGP aperture size %uMB (APSIZE %#x) is not right, using settings from NB\n", + bus, slot, func, 32 << *order, apsizereg); *order = old_order; } - pr_info("Aperture from AGP @ %Lx size %u MB (APSIZE %x)\n", aper, - 32 << *order, apsizereg); + pr_info("pci 0000:%02x:%02x.%d: AGP aperture [bus addr %#010Lx-%#010Lx] (%uMB, APSIZE %#x)\n", + bus, slot, func, aper, aper + (32ULL << (*order + 20)) - 1, + 32ULL << *order, apsizereg); if (!aperture_valid(aper, (32*1024*1024) << *order, 32<<20)) return 0; @@ -311,7 +314,8 @@ void __init early_gart_iommu_check(void) if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) { /* reserve it, so we can reuse it in second kernel */ - pr_info("update e820 for GART\n"); + pr_info("e820: reserve [mem %#010Lx-%#010Lx] for GART\n", + aper_base, aper_base + aper_size - 1); e820_add_region(aper_base, aper_size, E820_RESERVED); update_e820(); } @@ -396,8 +400,9 @@ int __init gart_iommu_hole_init(void) aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff; aper_base <<= 25; - pr_info("Node %d: aperture @ %Lx size %u MB\n", - node, aper_base, aper_size >> 20); + pr_info("Node %d: aperture [bus addr %#010Lx-%#010Lx] (%uMB)\n", + node, aper_base, aper_base + aper_size - 1, + aper_size >> 20); node++; if (!aperture_valid(aper_base, aper_size, 64<<20)) { @@ -408,7 +413,7 @@ int __init gart_iommu_hole_init(void) if (!no_iommu && max_pfn > MAX_DMA32_PFN && !printed_gart_size_msg) { - pr_err("you are using iommu with agp, but GART size is less than 64M\n"); + pr_err("you are using iommu with agp, but GART size is less than 64MB\n"); pr_err("please increase GART size in your BIOS setup\n"); pr_err("if BIOS doesn't have that option, contact your HW vendor!\n"); printed_gart_size_msg = 1; @@ -449,7 +454,7 @@ out: fallback_aper_force) { pr_info("Your BIOS doesn't leave a aperture memory hole\n"); pr_info("Please enable the IOMMU option in the BIOS setup\n"); - pr_info("This costs you %d MB of RAM\n", + pr_info("This costs you %dMB of RAM\n", 32 << fallback_aper_order); aper_order = fallback_aper_order;