From patchwork Wed May 21 23:18:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 4219091 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9AD30BEEAB for ; Wed, 21 May 2014 23:18:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BCA9B2038C for ; Wed, 21 May 2014 23:18:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5689720381 for ; Wed, 21 May 2014 23:18:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753643AbaEUXS3 (ORCPT ); Wed, 21 May 2014 19:18:29 -0400 Received: from mail-ig0-f169.google.com ([209.85.213.169]:51972 "EHLO mail-ig0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751899AbaEUXS1 (ORCPT ); Wed, 21 May 2014 19:18:27 -0400 Received: by mail-ig0-f169.google.com with SMTP id hl10so7385632igb.2 for ; Wed, 21 May 2014 16:18:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=subject:to:from:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; bh=deIVkg0CnKv016D9DNr7U9KhnHccJTTS+2fxe4VHS1Q=; b=NnH8pZOfsK6ZL/dU5qfZE1avpSHhZbRAj5sLHVlCLWcb34fsYppm9m98E0h97V8SJc 3OhnVD2cPSoW5ABt0F0thqlPCto4f0feRhNnpjLbnplwkWrqhduAZIKrkPuoPNLu7JGk VnKtMrHuTviqlNBkd5J3ga9m/J1XnTdpuiYnVwRdR6EDkbuNfAraNChv3g+ocgOnNAkZ v5WYYvbJKH/BuBxw39gPUi1EHOgXPr01/r2jcv/imhhL62yI8JPGaMQ4/ruJc9TfuP6t +2nX6OxwthyJ6o/vd+6wk2ybIZ/BGBJIOQ8ljG3eEbBdLxQJ/KkMZud8xWt1oKtPCAhE QnpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=deIVkg0CnKv016D9DNr7U9KhnHccJTTS+2fxe4VHS1Q=; b=kNC6Y739I5QAKl7+/BV60QhL9LkRFL7MTSpYoyWyNQnV239KEap84IVWsHTu6I86Qg mQnmENhV9DsAks4gXtIhPog4prMXyViE8JfmzkOqzU6rapC86t3MvX9hnDbgtTrpT1pV NyhjQEGNO9oHduHulpZAwW1Jm+PquC0jDSGfvadSCL5g8votmOi7SNaFVbW/eYi3OXQJ vxXU7gdi54bRmfgpcGjo7oxBYHDaGtWcCxPBxViOyPJDlG9LGyCZs9JqL7/5qSfUkF9F 7mA6Xm+LbHkba7XbdPGVWS7IVvuSQzsfGt2KvBgHuCFR6rnNwRgoMtNYMoUIb9nR1D1z avgw== X-Gm-Message-State: ALoCoQmu30D6r4zTZMTZUNUnA2iqYKt6gfryGMqpotfcY3ofiQyJW7v89ABz4KSvFfgPOampTVM2 X-Received: by 10.50.2.41 with SMTP id 9mr17814078igr.13.1400714305231; Wed, 21 May 2014 16:18:25 -0700 (PDT) Received: from localhost ([172.16.49.204]) by mx.google.com with ESMTPSA id hh13sm8606556igb.20.2014.05.21.16.18.24 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 21 May 2014 16:18:24 -0700 (PDT) Subject: [PATCH V5 4/4] x86/PCI: Clean up and mark early_root_info_init() as deprecated To: Suravee Suthikulpanit From: Bjorn Helgaas Cc: Robert Richter , Daniel J Blueman , Andreas Herrmann , linux-kernel@vger.kernel.org, Aravind Gopalakrishnan , linux-pci@vger.kernel.org, Borislav Petkov , Myron Stowe Date: Wed, 21 May 2014 17:18:23 -0600 Message-ID: <20140521231823.26447.2250.stgit@bhelgaas-glaptop.roam.corp.google.com> In-Reply-To: <20140521231615.26447.38060.stgit@bhelgaas-glaptop.roam.corp.google.com> References: <20140521231615.26447.38060.stgit@bhelgaas-glaptop.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Suravee Suthikulpanit early_root_info_init() is now deprecated in favor of info in ACPI. Add a note to that effect. Also, clean up the code a bit. There is no functional change. Signed-off-by: Suravee Suthikulpanit Signed-off-by: Bjorn Helgaas --- arch/x86/pci/amd_bus.c | 68 +++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 30 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c index 67dadf179348..cdce6ed59e2c 100644 --- a/arch/x86/pci/amd_bus.c +++ b/arch/x86/pci/amd_bus.c @@ -11,28 +11,33 @@ #include "bus_numa.h" -/* - * This discovers the pcibus <-> node mapping on AMD K8. - * also get peer root bus resource for io,mmio - */ +#define AMD_NB_F0_NODE_ID 0x60 +#define AMD_NB_F0_UNIT_ID 0x64 +#define AMD_NB_F1_CONFIG_MAP_REG 0xe0 + +#define RANGE_NUM 16 +#define AMD_NB_F1_CONFIG_MAP_RANGES 4 -struct pci_hostbridge_probe { +struct amd_hostbridge { u32 bus; u32 slot; - u32 vendor; u32 device; }; -static struct pci_hostbridge_probe pci_probes[] __initdata = { - { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1100 }, /* K8 */ - { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1200 }, /* Fam10h */ - { 0xff, 0, PCI_VENDOR_ID_AMD, 0x1200 }, /* Fam10h */ - { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1300 }, /* Fam11h */ - { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1600 }, /* Fam15h */ +/* + * IMPORTANT NOTE: + * hb_probes[] and early_root_info_init() is in maintenance mode. + * It only supports K8, Fam10h, Fam11h, and Fam15h_00h-0fh . + * Future processor will rely on information in ACPI. + */ +static struct amd_hostbridge hb_probes[] __initdata = { + { 0, 0x18, 0x1100 }, /* K8 */ + { 0, 0x18, 0x1200 }, /* Family10h */ + { 0xff, 0, 0x1200 }, /* Family10h */ + { 0, 0x18, 0x1300 }, /* Family11h */ + { 0, 0x18, 0x1600 }, /* Family15h */ }; -#define RANGE_NUM 16 - static struct pci_root_info __init *find_pci_root_info(int node, int link) { struct pci_root_info *info; @@ -46,12 +51,12 @@ static struct pci_root_info __init *find_pci_root_info(int node, int link) } /** - * early_fill_mp_bus_to_node() + * early_root_info_init() * called before pcibios_scan_root and pci_scan_bus - * fills the mp_bus_to_cpumask array based according to the LDT Bus Number - * Registers found in the K8 northbridge + * fills the mp_bus_to_cpumask array based according + * to the LDT Bus Number Registers found in the northbridge. */ -static int __init early_fill_mp_bus_info(void) +static int __init early_root_info_init(void) { int i; unsigned bus; @@ -76,19 +81,21 @@ static int __init early_fill_mp_bus_info(void) return -1; found = false; - for (i = 0; i < ARRAY_SIZE(pci_probes); i++) { + for (i = 0; i < ARRAY_SIZE(hb_probes); i++) { u32 id; u16 device; u16 vendor; - bus = pci_probes[i].bus; - slot = pci_probes[i].slot; + bus = hb_probes[i].bus; + slot = hb_probes[i].slot; id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); - vendor = id & 0xffff; device = (id>>16) & 0xffff; - if (pci_probes[i].vendor == vendor && - pci_probes[i].device == device) { + + if (vendor != PCI_VENDOR_ID_AMD) + continue; + + if (hb_probes[i].device == device) { found = true; break; } @@ -102,10 +109,11 @@ static int __init early_fill_mp_bus_info(void) * _CRS methods in the ACPI namespace. We extract node numbers * here to work around BIOSes that don't supply _PXM. */ - for (i = 0; i < 4; i++) { + for (i = 0; i < AMD_NB_F1_CONFIG_MAP_RANGES; i++) { int min_bus; int max_bus; - reg = read_pci_config(bus, slot, 1, 0xe0 + (i << 2)); + reg = read_pci_config(bus, slot, 1, + AMD_NB_F1_CONFIG_MAP_REG + (i << 2)); /* Check if that register is enabled for bus range */ if ((reg & 7) != 3) @@ -131,9 +139,9 @@ static int __init early_fill_mp_bus_info(void) return 0; /* get the default node and link for left over res */ - reg = read_pci_config(bus, slot, 0, 0x60); + reg = read_pci_config(bus, slot, 0, AMD_NB_F0_NODE_ID); def_node = (reg >> 8) & 0x07; - reg = read_pci_config(bus, slot, 0, 0x64); + reg = read_pci_config(bus, slot, 0, AMD_NB_F0_UNIT_ID); def_link = (reg >> 8) & 0x03; memset(range, 0, sizeof(range)); @@ -380,7 +388,7 @@ static int __init pci_io_ecs_init(void) int cpu; /* assume all cpus from fam10h have IO ECS */ - if (boot_cpu_data.x86 < 0x10) + if (boot_cpu_data.x86 < 0x10) return 0; /* Try the PCI method first. */ @@ -404,7 +412,7 @@ static int __init amd_postcore_init(void) if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) return 0; - early_fill_mp_bus_info(); + early_root_info_init(); if (boot_cpu_data.x86 <= 0x16) pci_io_ecs_init();