From patchwork Tue Jul 14 19:45:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 6788691 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3DAE49F3E6 for ; Tue, 14 Jul 2015 19:45:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6D3B7206A2 for ; Tue, 14 Jul 2015 19:45:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 771852069B for ; Tue, 14 Jul 2015 19:45:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752306AbbGNTpQ (ORCPT ); Tue, 14 Jul 2015 15:45:16 -0400 Received: from mail-ob0-f173.google.com ([209.85.214.173]:34122 "EHLO mail-ob0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752269AbbGNTpP (ORCPT ); Tue, 14 Jul 2015 15:45:15 -0400 Received: by obre1 with SMTP id e1so12848927obr.1 for ; Tue, 14 Jul 2015 12:45:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=subject:to:from:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; bh=AMsOvxNf8Q3cmuU4g1p0zCB8BGpn4XTRQDA46nQi1eI=; b=DR2yrXe00G3xiPOu58BosOCA07Eoe7gBordmxBcXaiuzW4fMRVNUVJaMwojII+R/z4 hSnwfnC5PBwR51R425hlv3RXYjKs//Tsy9y5WXHGUtE8VvNyEVXRtzEkjwpaXdFEUtOc yPajIbpFAQW88TxXFKE9mF0UrXCsYZe+PC6EOzpimnDtyooXqAmyINdP2FoaAv/3ZYCs iDe8zPHHyafT/lBQBiWddToQ/wl4NppFAR+rWHGoVEmKbF2A6sZlXm76IfbnemI0mRmh AJORh4mBodojWS+F1FjpCBxkMazEl206i7KhBYtvRPe2DGakYyuSwc7OOCbkA7I4u/hC 9lhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=AMsOvxNf8Q3cmuU4g1p0zCB8BGpn4XTRQDA46nQi1eI=; b=HOiuYOJb4t4kPp+fX1KkdBX53Q2QKd0tgxsoEyx1iQI8nbN6MAsovCEIZiZv7B6A3u /uAn0JpYobDeBP4Yude3e3CGujkPHbkbwUdyASYbQgfGQ1bMzWkcfkcTQiLbIUcvOVkd fHE9GCNKI17xegmtGqzBk84bGexGedyt8nWWi//6hk721sJB+3n5wTNc4mF5N4nfctiv bmYgNXI5aZ32Yxy2yJTs23NqIIQt6TbZ/TARnfoJQvhuIyXT3WWZKOE74UAZMfFuO4z+ FGxw1RVGuAqycRwJuvY9pRNZUU6rr2+bFQYHw6HRfGjVgKxys/tXK3GCj/nLTn+gglzO NMyQ== X-Gm-Message-State: ALoCoQn/V6Hwra2NgVQ88juCAAdIEBSTbTY+4Yq4R0sCnFDMJbmWcS8xod/1DFy7/rOzeFfnPyuY X-Received: by 10.182.29.68 with SMTP id i4mr181027obh.57.1436903114708; Tue, 14 Jul 2015 12:45:14 -0700 (PDT) Received: from localhost ([69.71.1.1]) by smtp.gmail.com with ESMTPSA id d70sm1029565oih.16.2015.07.14.12.45.12 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 14 Jul 2015 12:45:13 -0700 (PDT) Subject: [PATCH 2/2] PCI: Add pcie_downstream_port() (true for Root and Switch Downstream Ports) To: linux-pci@vger.kernel.org From: Bjorn Helgaas Cc: "Rafael J. Wysocki" , Myron Stowe , Jiang Liu Date: Tue, 14 Jul 2015 14:45:11 -0500 Message-ID: <20150714194511.13471.8395.stgit@bhelgaas-glaptop2.roam.corp.google.com> In-Reply-To: <20150714193757.13471.77973.stgit@bhelgaas-glaptop2.roam.corp.google.com> References: <20150714193757.13471.77973.stgit@bhelgaas-glaptop2.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As used in the PCIe spec, "Downstream Port" includes both Root Ports and Switch Downstream Ports. We sometimes checked for PCI_EXP_TYPE_DOWNSTREAM when we should have checked for PCI_EXP_TYPE_ROOT_PORT or PCI_EXP_TYPE_DOWNSTREAM. For a Root Port without a slot, the effect of this was that using pcie_capability_read_word() to read PCI_EXP_SLTSTA returned zero instead of showing the Presence Detect State bit hardwired to one as the PCIe Spec, r3.0, sec 7.8, requires. (This read is completed in software because previous PCIe spec versions didn't require PCI_EXP_SLTSTA to exist at all.) Nothing in the kernel currently depends on this (pciehp only reads PCI_EXP_SLTSTA on ports with slots), so this is a cleanup and not a functional change. Add a pcie_downstream_port() helper function and use it. Signed-off-by: Bjorn Helgaas --- drivers/pci/access.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/access.c b/drivers/pci/access.c index d9b64a1..79f0102 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c @@ -531,6 +531,14 @@ static inline int pcie_cap_version(const struct pci_dev *dev) return pcie_caps_reg(dev) & PCI_EXP_FLAGS_VERS; } +static bool pcie_downstream_port(constr struct pci_dev *dev) +{ + int type = pci_pcie_type(dev); + + return type == PCI_EXP_TYPE_ROOT_PORT || + type == PCI_EXP_TYPE_DOWNSTREAM; +} + bool pcie_cap_has_lnkctl(const struct pci_dev *dev) { int type = pci_pcie_type(dev); @@ -546,10 +554,7 @@ bool pcie_cap_has_lnkctl(const struct pci_dev *dev) static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev) { - int type = pci_pcie_type(dev); - - return (type == PCI_EXP_TYPE_ROOT_PORT || - type == PCI_EXP_TYPE_DOWNSTREAM) && + return pcie_downstream_port(dev) && pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT; } @@ -628,10 +633,9 @@ int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val) * State bit in the Slot Status register of Downstream Ports, * which must be hardwired to 1b. (PCIe Base Spec 3.0, sec 7.8) */ - if (pci_is_pcie(dev) && pos == PCI_EXP_SLTSTA && - pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) { + if (pci_is_pcie(dev) && pcie_downstream_port(dev) && + pos == PCI_EXP_SLTSTA) *val = PCI_EXP_SLTSTA_PDS; - } return 0; } @@ -657,10 +661,9 @@ int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val) return ret; } - if (pci_is_pcie(dev) && pos == PCI_EXP_SLTCTL && - pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) { + if (pci_is_pcie(dev) && pcie_downstream_port(dev) && + pos == PCI_EXP_SLTSTA) *val = PCI_EXP_SLTSTA_PDS; - } return 0; }