From patchwork Tue Jul 21 00:13:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 6831411 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id ACA24C05AC for ; Tue, 21 Jul 2015 00:14:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BB2FB2069F for ; Tue, 21 Jul 2015 00:14:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C73DD2064E for ; Tue, 21 Jul 2015 00:14:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755043AbbGUAOC (ORCPT ); Mon, 20 Jul 2015 20:14:02 -0400 Received: from mail-ig0-f175.google.com ([209.85.213.175]:34966 "EHLO mail-ig0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754181AbbGUAOB (ORCPT ); Mon, 20 Jul 2015 20:14:01 -0400 Received: by igr7 with SMTP id 7so26836054igr.0 for ; Mon, 20 Jul 2015 17:14:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=subject:to:from:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; bh=7Dm9SEi0oqDgwiEMhfT57XRGijKmaik4xER9WEImZbE=; b=bk0JY5saxnQiOqhZJKdBTiF+T3PtV8N9kF+NSMoxZYc+lsk3mNJggwg3YitSvbh6DG OK4muR5rCiFnL7I3sJczhsHBveK8q+I3l2xnPQMp2GMT9Ox7wTKS9jeOfU/+3bvPUMHZ ESedCrZM2HL5hWbcS4F8N6dh7g4bw3FL2mZ50pWhtZswH+YwmX5iFE6i+9noSMWAG1Wm wj5aO0c1EmBrLxh9AGnj39id3ScwGn+WslIGzps1D9somG9GsXtzg+U2QCJMJxm2/73Y p8GG0KGGRRLKOklPN6v46JZvPIN1l9fQhcxO5HVTjS5Cv8C2F83pIFv5nvrqmj0TtI92 m+aQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=7Dm9SEi0oqDgwiEMhfT57XRGijKmaik4xER9WEImZbE=; b=CJJj419pawfhbcPFerRbwNtQyoS2Toy6kPmHqKj61jSJQId3JskHJOvRPuBrC2BPb0 IeicoUca+8ch1XTCmPc+amKfiTWc/LvwDEqupjF44QEncXa9kV1uZehamTEQnDwA6z1I RwZOwbJD5PtK35gf7x/UhB9RDMqmMw2fuWDZL2Uo45cDaMH3aFvjNIoTgzjKi204fTGd K3Tlp9fsFGO+FmFq8xT73jCWDCkIHLEpJp61V3oEuHdUF+hmbhWXFjkPv4EwDdMChlin v7TrZv8H+RMjYgtZBfJUHz06LGwXnAaYqSc4AWsxeQsGq868Hxzu5j48gJ9ShTOxh1p5 xPOg== X-Gm-Message-State: ALoCoQkpcnuoy+yclO63tuKF+12sFaJMYHSpP79MdwSHoWtdAajxAWp+e4KWlkUFRcKa3Le/ijNI X-Received: by 10.107.9.65 with SMTP id j62mr13226291ioi.173.1437437640662; Mon, 20 Jul 2015 17:14:00 -0700 (PDT) Received: from localhost ([69.71.1.1]) by smtp.gmail.com with ESMTPSA id bd7sm6267034igb.19.2015.07.20.17.13.58 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 20 Jul 2015 17:13:59 -0700 (PDT) Subject: [PATCH v2 01/11] iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth To: linux-pci@vger.kernel.org, Joerg Roedel , David Woodhouse From: Bjorn Helgaas Cc: iommu@lists.linux-foundation.org, Gregor Dick Date: Mon, 20 Jul 2015 19:13:57 -0500 Message-ID: <20150721001357.28145.83631.stgit@bhelgaas-glaptop2.roam.corp.google.com> In-Reply-To: <20150721001243.28145.81610.stgit@bhelgaas-glaptop2.roam.corp.google.com> References: <20150721001243.28145.81610.stgit@bhelgaas-glaptop2.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.0 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We check the ATS state (enabled/disabled) and fetch the PCI ATS Invalidate Queue Depth in performance-sensitive paths. It's easy to cache these, which removes dependencies on PCI. Remember the ATS enabled state. When enabling, read the queue depth once and cache it in the device_domain_info struct. This is similar to what amd_iommu.c does. Signed-off-by: Bjorn Helgaas --- drivers/iommu/intel-iommu.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index a98a7b2..50832f1 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -408,6 +408,10 @@ struct device_domain_info { struct list_head global; /* link to global list */ u8 bus; /* PCI bus number */ u8 devfn; /* PCI devfn number */ + struct { + int enabled:1; + u8 qdep; + } ats; /* ATS state */ struct device *dev; /* it's NULL for PCIe-to-PCI bridge */ struct intel_iommu *iommu; /* IOMMU used by this device */ struct dmar_domain *domain; /* pointer to domain */ @@ -1391,19 +1395,26 @@ iommu_support_dev_iotlb (struct dmar_domain *domain, struct intel_iommu *iommu, static void iommu_enable_dev_iotlb(struct device_domain_info *info) { + struct pci_dev *pdev; + if (!info || !dev_is_pci(info->dev)) return; - pci_enable_ats(to_pci_dev(info->dev), VTD_PAGE_SHIFT); + pdev = to_pci_dev(info->dev); + if (pci_enable_ats(pdev, VTD_PAGE_SHIFT)) + return; + + info->ats.enabled = 1; + info->ats.qdep = pci_ats_queue_depth(pdev); } static void iommu_disable_dev_iotlb(struct device_domain_info *info) { - if (!info->dev || !dev_is_pci(info->dev) || - !pci_ats_enabled(to_pci_dev(info->dev))) + if (!info->ats.enabled) return; pci_disable_ats(to_pci_dev(info->dev)); + info->ats.enabled = 0; } static void iommu_flush_dev_iotlb(struct dmar_domain *domain, @@ -1415,16 +1426,11 @@ static void iommu_flush_dev_iotlb(struct dmar_domain *domain, spin_lock_irqsave(&device_domain_lock, flags); list_for_each_entry(info, &domain->devices, link) { - struct pci_dev *pdev; - if (!info->dev || !dev_is_pci(info->dev)) - continue; - - pdev = to_pci_dev(info->dev); - if (!pci_ats_enabled(pdev)) + if (!info->ats.enabled) continue; sid = info->bus << 8 | info->devfn; - qdep = pci_ats_queue_depth(pdev); + qdep = info->ats.qdep; qi_flush_dev_iotlb(info->iommu, sid, qdep, addr, mask); } spin_unlock_irqrestore(&device_domain_lock, flags);