From patchwork Tue Aug 11 15:51:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 6993021 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 094809F39D for ; Tue, 11 Aug 2015 15:51:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 90A41205F0 for ; Tue, 11 Aug 2015 15:51:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 43E04205B6 for ; Tue, 11 Aug 2015 15:51:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965208AbbHKPvM (ORCPT ); Tue, 11 Aug 2015 11:51:12 -0400 Received: from mail-ig0-f179.google.com ([209.85.213.179]:34257 "EHLO mail-ig0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965045AbbHKPvL (ORCPT ); Tue, 11 Aug 2015 11:51:11 -0400 Received: by igui7 with SMTP id i7so43098522igu.1 for ; Tue, 11 Aug 2015 08:51:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=subject:to:from:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; bh=aEth6RK0j/wqUjVuEvZ9x93yoz2//yutaGxoPn9u0Iw=; b=dTkbbIGHlrx9nHa1f0xPff81Gho/xK/84OA95od/WgC+YOWyxTwQ6hGkQYL3iohJxs 6ZK5wDY2ZlXQdgu3W1iRdP2mp8kxknF5SvZhtFBsLnjSZ+y1RjdF3bPgLnl7MyJR9+Mt MZ7G2PzIbU17PN+2eFd/95bHI1671xCuaZz7pI3xYf38wIc9ftrKpvBqDVvufMTR+wgW IVhMwjYoHCyIprZqsu8J5fxnZ7VowvGApo4G37J7osbouYJ9aNyTmIItKj83wdmQZzxv MQTBUFmtaJ5jy40hR7fybnfdGCVTCWU1oWI+Jiz2AFZ0kDLtoFUl3f0guA1+Cde5+h4S mZyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:subject:to:from:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-type :content-transfer-encoding; bh=aEth6RK0j/wqUjVuEvZ9x93yoz2//yutaGxoPn9u0Iw=; b=HjIQ1G79VX7VsIDOs2/H0GeheSRLFw+CMa1wjxUnNqGyJcDTTR8hla1rbKSsE0G9k1 I56pU0DSIvEisYnWrVhseYZdRyaF7ldXuFD+ZoPT42dm426qppqcfxVZnBu/g7Uo1LTH IxFcLe2VWXqliWs9lbK32L8WfY7gb4cj2pvFN9V6lD6vjknEx8j9sY/NI6uP/TouXGPi 4u8ZmhzfV5NWszmlz14yjoohoCLvlRvqlcQpe8bw917A2z8PYk3mQUZm5pQxcwXFdJWr iRq1QPVVyvo/NnjK2l0zJ81CBS7kf+FqYR413pOZj7Ssx2BMj5HdOrGB0cnh6DCNI+Te SETg== X-Gm-Message-State: ALoCoQlHHl0ntu9JXG+iTaeGIHLcPlX6AhrAk6CsguPyS5M7lkqlieEcvNTiysi1DV2vphBukQuX X-Received: by 10.50.112.231 with SMTP id it7mr11656201igb.45.1439308270449; Tue, 11 Aug 2015 08:51:10 -0700 (PDT) Received: from localhost ([2620:0:1007:b:254d:7b22:9adf:e278]) by smtp.gmail.com with ESMTPSA id a8sm1770535igo.2.2015.08.11.08.51.08 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 11 Aug 2015 08:51:08 -0700 (PDT) Subject: [PATCH v3 01/11] iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth To: linux-pci@vger.kernel.org, Joerg Roedel , David Woodhouse From: Bjorn Helgaas Cc: Gregor Dick , iommu@lists.linux-foundation.org, Yinghai Lu Date: Tue, 11 Aug 2015 10:51:07 -0500 Message-ID: <20150811155107.21078.24884.stgit@bhelgaas-glaptop2.roam.corp.google.com> In-Reply-To: <20150811154525.21078.85310.stgit@bhelgaas-glaptop2.roam.corp.google.com> References: <20150811154525.21078.85310.stgit@bhelgaas-glaptop2.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We check the ATS state (enabled/disabled) and fetch the PCI ATS Invalidate Queue Depth in performance-sensitive paths. It's easy to cache these, which removes dependencies on PCI. Remember the ATS enabled state. When enabling, read the queue depth once and cache it in the device_domain_info struct. This is similar to what amd_iommu.c does. Signed-off-by: Bjorn Helgaas Reviewed-by: Joerg Roedel Acked-by: Joerg Roedel --- drivers/iommu/intel-iommu.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index a98a7b2..c22a549 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -408,6 +408,10 @@ struct device_domain_info { struct list_head global; /* link to global list */ u8 bus; /* PCI bus number */ u8 devfn; /* PCI devfn number */ + struct { + u8 enabled:1; + u8 qdep; + } ats; /* ATS state */ struct device *dev; /* it's NULL for PCIe-to-PCI bridge */ struct intel_iommu *iommu; /* IOMMU used by this device */ struct dmar_domain *domain; /* pointer to domain */ @@ -1391,19 +1395,26 @@ iommu_support_dev_iotlb (struct dmar_domain *domain, struct intel_iommu *iommu, static void iommu_enable_dev_iotlb(struct device_domain_info *info) { + struct pci_dev *pdev; + if (!info || !dev_is_pci(info->dev)) return; - pci_enable_ats(to_pci_dev(info->dev), VTD_PAGE_SHIFT); + pdev = to_pci_dev(info->dev); + if (pci_enable_ats(pdev, VTD_PAGE_SHIFT)) + return; + + info->ats.enabled = 1; + info->ats.qdep = pci_ats_queue_depth(pdev); } static void iommu_disable_dev_iotlb(struct device_domain_info *info) { - if (!info->dev || !dev_is_pci(info->dev) || - !pci_ats_enabled(to_pci_dev(info->dev))) + if (!info->ats.enabled) return; pci_disable_ats(to_pci_dev(info->dev)); + info->ats.enabled = 0; } static void iommu_flush_dev_iotlb(struct dmar_domain *domain, @@ -1415,16 +1426,11 @@ static void iommu_flush_dev_iotlb(struct dmar_domain *domain, spin_lock_irqsave(&device_domain_lock, flags); list_for_each_entry(info, &domain->devices, link) { - struct pci_dev *pdev; - if (!info->dev || !dev_is_pci(info->dev)) - continue; - - pdev = to_pci_dev(info->dev); - if (!pci_ats_enabled(pdev)) + if (!info->ats.enabled) continue; sid = info->bus << 8 | info->devfn; - qdep = pci_ats_queue_depth(pdev); + qdep = info->ats.qdep; qi_flush_dev_iotlb(info->iommu, sid, qdep, addr, mask); } spin_unlock_irqrestore(&device_domain_lock, flags); @@ -2272,6 +2278,8 @@ static struct dmar_domain *dmar_insert_dev_info(struct intel_iommu *iommu, info->bus = bus; info->devfn = devfn; + info->ats.enabled = 0; + info->ats.qdep = 0; info->dev = dev; info->domain = domain; info->iommu = iommu;