From patchwork Tue Aug 25 02:49:41 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 7067881 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4B2A4C05AC for ; Tue, 25 Aug 2015 02:49:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0920620749 for ; Tue, 25 Aug 2015 02:49:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CA2CB20755 for ; Tue, 25 Aug 2015 02:49:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751687AbbHYCtr (ORCPT ); Mon, 24 Aug 2015 22:49:47 -0400 Received: from mail-oi0-f46.google.com ([209.85.218.46]:35685 "EHLO mail-oi0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751580AbbHYCtq (ORCPT ); Mon, 24 Aug 2015 22:49:46 -0400 Received: by oiew67 with SMTP id w67so93021664oie.2 for ; Mon, 24 Aug 2015 19:49:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=YqFDpEt+gKHr+vJBhC5M0dRhypMCbWT3U/C8oYRGubI=; b=izV2FangbLX83Rd4VK8BTd5suCcR2tOBMPj7yFHV5GcVGgl7CZIEiaxpTB9ay4BfSK yTMPSUHi32yzVfEGfJGZtXy27wPZ6EVmPPLDr5PB791mJIZCwNZ0JhDOdfcmjCGY6P0C 0Gr3G0sO+2y3Hc1IFyvTrq6eU9h3Yo5A3v1KEMs2jQ5qVOukaffjPdKhFzJR02ivMDH1 yREz/pipKI0iVlh4zn0JK7A37Oee70gwarfMET7XSh57PJLUw1qez8RWGABq8oeBPVVV 0YmiLElqJaufYpTukx8HOJ+d6Stgd+4reGfpq59CJoeBieYQJ6uSNqAp4RC9dXHQt6vS feWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-type:content-disposition:in-reply-to :user-agent; bh=YqFDpEt+gKHr+vJBhC5M0dRhypMCbWT3U/C8oYRGubI=; b=UX4bK35Yf/HlpFB9fEgYhPe+/6MWeg6hzyW2Pdngdy0yjqUkU/E3UjJ4FzeBngq29W DmNSCvNvLAY7tonrhUXFnCaClp61kd5EkTgq/bkXZwlWc2fmNQU51BTGsEavMWX87CCr dxgUqttNcx58JqMfbyG4o831NxSpEayJ5b2pqbppS5MOP0F/0uBGv85lV1vIF1WzsU97 ABOW/BBJ75CRM07RcY3TLd1JDJbzfBVgYbeOeXKx0Y5ckPKR2PElkDgOHU+KvEdA7/gf Wc+2dbIJqtWmazfZ3iBf+RlWBneBcmp+mYWKbpcrWI05yjADHzedgsb/ddXpRTlyxrIA S8LQ== X-Gm-Message-State: ALoCoQnmknfrpKT+UEESjhFTRwBjz3F34GQkkLT0r1HkEAoGKcnNiEn1FUqmiq9mEp2CTIlxhMiI X-Received: by 10.202.76.85 with SMTP id z82mr23339209oia.49.1440470986092; Mon, 24 Aug 2015 19:49:46 -0700 (PDT) Received: from google.com ([69.71.1.1]) by smtp.gmail.com with ESMTPSA id y198sm11690677oia.27.2015.08.24.19.49.43 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 24 Aug 2015 19:49:44 -0700 (PDT) Date: Mon, 24 Aug 2015 21:49:41 -0500 From: Bjorn Helgaas To: Zhang Rui Cc: linux-pci , chuansheng.liu@intel.com, Tejun Heo , Alan Stern , Aaron Lu , MyMailClone@t-online.de, mister.freeman@laposte.net, "Rafael J. Wysocki" Subject: Re: [PATCH] PCI: Disable async suspend/resume for Jmicron chip Message-ID: <20150825024941.GA25829@google.com> References: <1438047747.1856.12.camel@rzhang1-mobl4> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1438047747.1856.12.camel@rzhang1-mobl4> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.2 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Tue, Jul 28, 2015 at 09:42:27AM +0800, Zhang Rui wrote: > From 57edba9c677e47354846db951014dc4d5b13ce54 Mon Sep 17 00:00:00 2001 > From: Zhang Rui > Date: Sun, 26 Jul 2015 14:15:36 +0800 > Subject: [PATCH] PCI: Disable async suspend/resume for Jmicron chip ... In the interest of making progress on this, I reworked this to be what I'm looking for. It's not significantly different code-wise from what you posted originally, so I left your Signed-off-by. But let me know if I messed it up. We don't actually *know* whether the quirk needs to be applied before pata_jmicron is loaded, but my guess is that is does, so I left it as a PCI quirk rather than as a driver quirk. Comments welcome! Bjorn commit 09981db5b0c9a6865aa39126b71bc87718577e4b Author: Zhang Rui Date: Mon Aug 24 15:27:11 2015 -0500 PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCI On multi-function JMicron SATA/PATA/AHCI devices, the PATA controller at function 1 doesn't work if it is powered on before the SATA controller at function 0. The result is that PATA doesn't work after resume, and messages like this: pata_jmicron 0000:02:00.1: Refused to change power state, currently in D3 irq 17: nobody cared (try booting with the "irqpoll" option) e6b7e41cdd8c ("ata: Disabling the async PM for JMicron chip 363/361") solved this problem for JMicron 361 and 363 devices. With async suspend disabled, we always power on function 0 before function 1. Barto then reported the same problem with a JMicron 368 (see comment #57 in the bugzilla). Rather than extending the blacklist piecemeal, disable async suspend for all JMicron multi-function SATA/PATA/AHCI devices. This quirk could stay in the ahci and pata_jmicron drivers, but it's likely the problem will occur even if pata_jmicron isn't loaded until after the suspend/resume. Making it a PCI quirk ensures that we'll preserve the power-on order even if the drivers aren't loaded. [bhelgaas: changelog, limit to multi-function, limit to IDE/ATA] Link: https://bugzilla.kernel.org/show_bug.cgi?id=81551 Reported-by: Barto Signed-off-by: Zhang Rui Signed-off-by: Bjorn Helgaas --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 7e62751..a466602 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -351,6 +351,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { /* JMicron 362B and 362C have an AHCI function with IDE class code */ { PCI_VDEVICE(JMICRON, 0x2362), board_ahci_ign_iferr }, { PCI_VDEVICE(JMICRON, 0x236f), board_ahci_ign_iferr }, + /* May need to update quirk_jmicron_async_suspend() for additions */ /* ATI */ { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */ @@ -1451,18 +1452,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) else if (pdev->vendor == 0x177d && pdev->device == 0xa01c) ahci_pci_bar = AHCI_PCI_BAR_CAVIUM; - /* - * The JMicron chip 361/363 contains one SATA controller and one - * PATA controller,for powering on these both controllers, we must - * follow the sequence one by one, otherwise one of them can not be - * powered on successfully, so here we disable the async suspend - * method for these chips. - */ - if (pdev->vendor == PCI_VENDOR_ID_JMICRON && - (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 || - pdev->device == PCI_DEVICE_ID_JMICRON_JMB361)) - device_disable_async_suspend(&pdev->dev); - /* acquire resources */ rc = pcim_enable_device(pdev); if (rc) diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c index 47e418b..4d1a5d2 100644 --- a/drivers/ata/pata_jmicron.c +++ b/drivers/ata/pata_jmicron.c @@ -143,18 +143,6 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i }; const struct ata_port_info *ppi[] = { &info, NULL }; - /* - * The JMicron chip 361/363 contains one SATA controller and one - * PATA controller,for powering on these both controllers, we must - * follow the sequence one by one, otherwise one of them can not be - * powered on successfully, so here we disable the async suspend - * method for these chips. - */ - if (pdev->vendor == PCI_VENDOR_ID_JMICRON && - (pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 || - pdev->device == PCI_DEVICE_ID_JMICRON_JMB361)) - device_disable_async_suspend(&pdev->dev); - return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0); } diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index b6af4b0..5e35a9d 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -1570,6 +1570,18 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB3 #endif +static void quirk_jmicron_async_suspend(struct pci_dev *dev) +{ + if (dev->multifunction) { + device_disable_async_suspend(&dev->dev); + dev_info(&dev->dev, "async suspend disabled to avoid multi-function power-on ordering issue\n"); + } +} +DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY, PCI_CLASS_STORAGE_IDE, 8, quirk_jmicron_async_suspend); +DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY, PCI_CLASS_STORAGE_SATA_AHCI, 0, quirk_jmicron_async_suspend); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, 0x2362, quirk_jmicron_async_suspend); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, 0x236f, quirk_jmicron_async_suspend); + #ifdef CONFIG_X86_IO_APIC static void quirk_alder_ioapic(struct pci_dev *pdev) {