From patchwork Thu May 19 11:36:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 9126871 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: patchwork-linux-pci@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E702ABF29F for ; Thu, 19 May 2016 11:36:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0894520225 for ; Thu, 19 May 2016 11:36:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8A7DC2022A for ; Thu, 19 May 2016 11:36:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754317AbcESLgf (ORCPT ); Thu, 19 May 2016 07:36:35 -0400 Received: from mga04.intel.com ([192.55.52.120]:35260 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754492AbcESLge (ORCPT ); Thu, 19 May 2016 07:36:34 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP; 19 May 2016 04:36:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,334,1459839600"; d="scan'208";a="970340115" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.157]) by fmsmga001.fm.intel.com with SMTP; 19 May 2016 04:36:31 -0700 Received: by lahna (sSMTP sendmail emulation); Thu, 19 May 2016 14:36:30 +0300 Date: Thu, 19 May 2016 14:36:30 +0300 From: Mika Westerberg To: Peter Wu Cc: Bjorn Helgaas , "Rafael J. Wysocki" , Lukas Wunner , linux-pci@vger.kernel.org, linux-pm@vger.kernel.org Subject: Re: Rescanning is broken with runtime PM for PCIe ports Message-ID: <20160519113630.GT2043@lahna.fi.intel.com> References: <20160518171401.GC1222@al> <20160519074231.GJ2043@lahna.fi.intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20160519074231.GJ2043@lahna.fi.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.6.1 (2016-04-27) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, May 19, 2016 at 10:42:31AM +0300, Mika Westerberg wrote: > On Wed, May 18, 2016 at 07:14:01PM +0200, Peter Wu wrote: > > Hi, > > > > While testing the pci/pm tree from Bjorn with HEAD being 0195d2813547 > > ("PCI: Add runtime PM support for PCIe ports"), I have noticed that > > detaching and rescanning is broken. > > > > When a bridgr is in D3 state, it cannot discover children. Reproducer: > > > > echo > /sys/bus/pci/devices/0000:01:00.0/remove 1 > > # wait for the PCIe port to enter D3cold > > echo > /sys/bus/pci/devices/0000:00:01.0/rescan 1 > > # Workaround to get the device back > > echo > /sys/bus/pci/devices/0000:00:01.0/power/control on > > echo > /sys/bus/pci/devices/0000:00:01.0/rescan 1 > > > > lspci: > > > > 00:01.0 PCI bridge [0604]: Intel Corporation Skylake PCIe Controller (x16) [8086:1901] (rev 07) > > 01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GM204M [GeForce GTX 965M] [10de:13d9] (rev a1) > > > > Probably needs a pm_runtime_{get,put}_sync in pci_rescan_bus and > > pci_rescan_bus_bridge_resize. > > Thanks for reporting. Let me investigate this a bit. I think it is enough if we make sure the bridge is powered when it is being scanned. Can you try if the below patch works for you? --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 8004f67c57ec..15e77c92311e 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "pci.h" #define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */ @@ -832,6 +833,12 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass) u8 primary, secondary, subordinate; int broken = 0; + /* + * Make sure the bridge is powered on to be able to access config + * space of devices below it. + */ + pm_runtime_get_sync(&dev->dev); + pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses); primary = buses & 0xFF; secondary = (buses >> 8) & 0xFF; @@ -1012,6 +1019,8 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass) out: pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl); + pm_runtime_put(&dev->dev); + return max; } EXPORT_SYMBOL(pci_scan_bridge);