From patchwork Wed Sep 21 22:38:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Covington X-Patchwork-Id: 9344343 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7FCC9607D0 for ; Wed, 21 Sep 2016 22:38:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A1C72A3BF for ; Wed, 21 Sep 2016 22:38:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7DE5E2A406; Wed, 21 Sep 2016 22:38:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B20A72A3BF for ; Wed, 21 Sep 2016 22:38:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755766AbcIUWiY (ORCPT ); Wed, 21 Sep 2016 18:38:24 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:47949 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755762AbcIUWiX (ORCPT ); Wed, 21 Sep 2016 18:38:23 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 552C8616FF; Wed, 21 Sep 2016 22:38:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1474497502; bh=UQnM2k3Ica9GQn58bXmMrCNm5YvREnz3jRW3rHfLxx0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iUelTyQ0l6ozN6FwYWuoiKueY1m/j2WWqySnUiNwe/AJdVWoFtiGIGt4U4jkUxJ7x QH1qR32Pfac/8xmURx3h2VdqdVIhUhUPwvp0QWX8IJLyYLNPFIenakxhufV+GvYHGI Xhj1oHSXE29bgtrgjrLHcw2J4SD4GX4kFabPvNnU= Received: from illium.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: cov@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 14FB461568; Wed, 21 Sep 2016 22:38:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1474497501; bh=UQnM2k3Ica9GQn58bXmMrCNm5YvREnz3jRW3rHfLxx0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q4d3brzh5DeMCrktXq/mF6ItblqdT/98ZaiblcR8PT+iW5KVW9HDLgwMCceV4cfcA WR/+QSOK01MbMezOW/C5rJij4zCnZBvD1YdKcEH24PA+w5913asT0ozb2t2EjneL4G /SYEXTJiXLrKm6p9xVnjAVEhTXzUGsJVr2dU2sSA= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 14FB461568 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=cov@codeaurora.org From: Christopher Covington To: Bjorn Helgaas Cc: Sinan Kaya , Tomasz Nowicki , will.deacon@arm.com, catalin.marinas@arm.com, rafael@kernel.org, Lorenzo.Pieralisi@arm.com, arnd@arndb.de, hanjun.guo@linaro.org, jchandra@broadcom.com, dhdang@apm.com, ard.biesheuvel@linaro.org, robert.richter@caviumnetworks.com, mw@semihalf.com, Liviu.Dudau@arm.com, ddaney@caviumnetworks.com, wangyijing@huawei.com, msalter@redhat.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linaro-acpi@lists.linaro.org, jcm@redhat.com, andrea.gallo@linaro.org, jeremy.linton@arm.com, liudongdong3@huawei.com, gabriele.paoloni@huawei.com, jhugo@codeaurora.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, Christopher Covington Subject: [PATCHv2] PCI: QDF2432 32 bit config space accessors Date: Wed, 21 Sep 2016 18:38:05 -0400 Message-Id: <20160921223805.21652-1-cov@codeaurora.org> X-Mailer: git-send-email 2.9.2 In-Reply-To: <20160921173129.GA20006@localhost> References: <20160921173129.GA20006@localhost> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Qualcomm Technologies QDF2432 SoC does not support accesses smaller than 32 bits to the PCI configuration space. Register the appropriate quirk. Signed-off-by: Christopher Covington --- drivers/acpi/pci_mcfg.c | 8 ++++++++ drivers/pci/ecam.c | 10 ++++++++++ include/linux/pci-ecam.h | 1 + 3 files changed, 19 insertions(+) diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c index 245b79f..212334f 100644 --- a/drivers/acpi/pci_mcfg.c +++ b/drivers/acpi/pci_mcfg.c @@ -96,6 +96,14 @@ static struct mcfg_fixup mcfg_quirks[] = { THUNDER_ECAM_MCFG(2, 12), THUNDER_ECAM_MCFG(2, 13), #endif + { "QCOM ", "QDF2432 ", 1, 0, MCFG_BUS_ANY, &pci_32b_ops }, + { "QCOM ", "QDF2432 ", 1, 1, MCFG_BUS_ANY, &pci_32b_ops }, + { "QCOM ", "QDF2432 ", 1, 2, MCFG_BUS_ANY, &pci_32b_ops }, + { "QCOM ", "QDF2432 ", 1, 3, MCFG_BUS_ANY, &pci_32b_ops }, + { "QCOM ", "QDF2432 ", 1, 4, MCFG_BUS_ANY, &pci_32b_ops }, + { "QCOM ", "QDF2432 ", 1, 5, MCFG_BUS_ANY, &pci_32b_ops }, + { "QCOM ", "QDF2432 ", 1, 6, MCFG_BUS_ANY, &pci_32b_ops }, + { "QCOM ", "QDF2432 ", 1, 7, MCFG_BUS_ANY, &pci_32b_ops }, }; static char mcfg_oem_id[ACPI_OEM_ID_SIZE]; diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c index 43ed08d..c3b3063 100644 --- a/drivers/pci/ecam.c +++ b/drivers/pci/ecam.c @@ -162,3 +162,13 @@ struct pci_ecam_ops pci_generic_ecam_ops = { .write = pci_generic_config_write, } }; + +/* ops for 32 bit config space access quirk */ +struct pci_ecam_ops pci_32b_ops = { + .bus_shift = 20, + .pci_ops = { + .map_bus = pci_ecam_map_bus, + .read = pci_generic_config_read32, + .write = pci_generic_config_write32, + } +}; diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h index 35f0e81..a6cffb8 100644 --- a/include/linux/pci-ecam.h +++ b/include/linux/pci-ecam.h @@ -65,6 +65,7 @@ extern struct pci_ecam_ops pci_thunder_pem_ops; #ifdef CONFIG_PCI_HOST_THUNDER_ECAM extern struct pci_ecam_ops pci_thunder_ecam_ops; #endif +extern struct pci_ecam_ops pci_32b_ops; #ifdef CONFIG_PCI_HOST_GENERIC /* for DT-based PCI controllers that support ECAM */