From patchwork Wed Oct 12 13:42:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 9373163 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B7B0B60487 for ; Wed, 12 Oct 2016 13:42:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A9597295E5 for ; Wed, 12 Oct 2016 13:42:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9DFCD29DE5; Wed, 12 Oct 2016 13:42:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 43588295E5 for ; Wed, 12 Oct 2016 13:42:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755086AbcJLNm4 (ORCPT ); Wed, 12 Oct 2016 09:42:56 -0400 Received: from mail.kernel.org ([198.145.29.136]:39744 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754898AbcJLNm4 (ORCPT ); Wed, 12 Oct 2016 09:42:56 -0400 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A732420212; Wed, 12 Oct 2016 13:42:54 +0000 (UTC) Received: from localhost (unknown [69.71.4.155]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 99F2220172; Wed, 12 Oct 2016 13:42:53 +0000 (UTC) Subject: [PATCH v2 3/8] PCI: hisi: Name private struct pointer "hisi_pcie" consistently To: Zhou Wang , Gabriele Paoloni From: Bjorn Helgaas Cc: linux-pci@vger.kernel.org Date: Wed, 12 Oct 2016 08:42:51 -0500 Message-ID: <20161012134251.28562.36477.stgit@bhelgaas-glaptop2.roam.corp.google.com> In-Reply-To: <20161012133904.28562.74066.stgit@bhelgaas-glaptop2.roam.corp.google.com> References: <20161012133904.28562.74066.stgit@bhelgaas-glaptop2.roam.corp.google.com> User-Agent: StGit/0.16 MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Most struct hisi_pcie pointers are already called "hisi_pcie". Change the rest of them to match. No functional change intended. Signed-off-by: Bjorn Helgaas --- drivers/pci/host/pcie-hisi.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c index d4a5812..28c95b8 100644 --- a/drivers/pci/host/pcie-hisi.c +++ b/drivers/pci/host/pcie-hisi.c @@ -33,7 +33,7 @@ struct hisi_pcie; struct pcie_soc_ops { - int (*hisi_pcie_link_up)(struct hisi_pcie *pcie); + int (*hisi_pcie_link_up)(struct hisi_pcie *hisi_pcie); }; struct hisi_pcie { @@ -44,15 +44,15 @@ struct hisi_pcie { struct pcie_soc_ops *soc_ops; }; -static inline void hisi_pcie_apb_writel(struct hisi_pcie *pcie, +static inline void hisi_pcie_apb_writel(struct hisi_pcie *hisi_pcie, u32 val, u32 reg) { - writel(val, pcie->reg_base + reg); + writel(val, hisi_pcie->reg_base + reg); } -static inline u32 hisi_pcie_apb_readl(struct hisi_pcie *pcie, u32 reg) +static inline u32 hisi_pcie_apb_readl(struct hisi_pcie *hisi_pcie, u32 reg) { - return readl(pcie->reg_base + reg); + return readl(hisi_pcie->reg_base + reg); } /* HipXX PCIe host only supports 32-bit config access */ @@ -61,12 +61,12 @@ static int hisi_pcie_cfg_read(struct pcie_port *pp, int where, int size, { u32 reg; u32 reg_val; - struct hisi_pcie *pcie = to_hisi_pcie(pp); + struct hisi_pcie *hisi_pcie = to_hisi_pcie(pp); void *walker = ®_val; walker += (where & 0x3); reg = where & ~0x3; - reg_val = hisi_pcie_apb_readl(pcie, reg); + reg_val = hisi_pcie_apb_readl(hisi_pcie, reg); if (size == 1) *val = *(u8 __force *) walker; @@ -86,21 +86,21 @@ static int hisi_pcie_cfg_write(struct pcie_port *pp, int where, int size, { u32 reg_val; u32 reg; - struct hisi_pcie *pcie = to_hisi_pcie(pp); + struct hisi_pcie *hisi_pcie = to_hisi_pcie(pp); void *walker = ®_val; walker += (where & 0x3); reg = where & ~0x3; if (size == 4) - hisi_pcie_apb_writel(pcie, val, reg); + hisi_pcie_apb_writel(hisi_pcie, val, reg); else if (size == 2) { - reg_val = hisi_pcie_apb_readl(pcie, reg); + reg_val = hisi_pcie_apb_readl(hisi_pcie, reg); *(u16 __force *) walker = val; - hisi_pcie_apb_writel(pcie, reg_val, reg); + hisi_pcie_apb_writel(hisi_pcie, reg_val, reg); } else if (size == 1) { - reg_val = hisi_pcie_apb_readl(pcie, reg); + reg_val = hisi_pcie_apb_readl(hisi_pcie, reg); *(u8 __force *) walker = val; - hisi_pcie_apb_writel(pcie, reg_val, reg); + hisi_pcie_apb_writel(hisi_pcie, reg_val, reg); } else return PCIBIOS_BAD_REGISTER_NUMBER;