From patchwork Tue Aug 15 19:02:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 9902387 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BA1316028A for ; Tue, 15 Aug 2017 19:03:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 86A30288D8 for ; Tue, 15 Aug 2017 19:03:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7B96F288DE; Tue, 15 Aug 2017 19:03:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E9D7B288D8 for ; Tue, 15 Aug 2017 19:03:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753224AbdHOTDv (ORCPT ); Tue, 15 Aug 2017 15:03:51 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:18917 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752453AbdHOTDu (ORCPT ); Tue, 15 Aug 2017 15:03:50 -0400 Received: from hhmail02.hh.imgtec.org (unknown [10.100.10.20]) by Forcepoint Email with ESMTPS id 30FA0FA16C288; Tue, 15 Aug 2017 20:03:45 +0100 (IST) Received: from localhost (10.20.1.88) by hhmail02.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0; Tue, 15 Aug 2017 20:03:48 +0100 From: Paul Burton To: Bjorn Helgaas , CC: Paul Burton , Ley Foon Tan , Subject: [PATCH v7 3/8] PCI: altera: Use size=4 IRQ domain for legacy INTx Date: Tue, 15 Aug 2017 12:02:18 -0700 Message-ID: <20170815190223.18807-4-paul.burton@imgtec.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170815190223.18807-1-paul.burton@imgtec.com> References: <20170815190223.18807-1-paul.burton@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.20.1.88] Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The devicetree binding documentation for the Altera PCIe controller shows an example which uses an interrupt-map property to map PCI INTx interrupts to hardware IRQ numbers 1-4. The driver creates an IRQ domain with size 5 in order to cover this range, with hwirq=0 left unused. This patch cleans up this wasted IRQ domain entry, modifying the driver to use an IRQ domain of size 4 which matches the actual number of PCI INTx interrupts. Since the hwirq numbers 1-4 are part of the devicetree binding, and this is considered ABI, we cannot simply change the interrupt-map property to use the range 0-3. Instead we make use of the pci_irqd_intx_xlate() helper function to translate the range 1-4 used at the DT level into the range 0-3 which is now used within the driver, and stop adding 1 to decoded hwirq numbers in altera_pcie_isr(). Whilst cleaning up INTx handling we make use of the new PCI_NUM_INTX macro & drop the custom INTX_NUM definition. Signed-off-by: Paul Burton Cc: Bjorn Helgaas Cc: Ley Foon Tan Cc: linux-pci@vger.kernel.org Cc: rfi@lists.rocketboards.org --- I have only build tested this. Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/pci/host/pcie-altera.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c index 4ea4f8f5dc77..6fced590eb87 100644 --- a/drivers/pci/host/pcie-altera.c +++ b/drivers/pci/host/pcie-altera.c @@ -76,8 +76,6 @@ #define LINK_UP_TIMEOUT HZ #define LINK_RETRAIN_TIMEOUT HZ -#define INTX_NUM 4 - #define DWORD_MASK 3 struct altera_pcie { @@ -464,6 +462,7 @@ static int altera_pcie_intx_map(struct irq_domain *domain, unsigned int irq, static const struct irq_domain_ops intx_domain_ops = { .map = altera_pcie_intx_map, + .xlate = pci_irqd_intx_xlate, }; static void altera_pcie_isr(struct irq_desc *desc) @@ -481,11 +480,11 @@ static void altera_pcie_isr(struct irq_desc *desc) while ((status = cra_readl(pcie, P2A_INT_STATUS) & P2A_INT_STS_ALL) != 0) { - for_each_set_bit(bit, &status, INTX_NUM) { + for_each_set_bit(bit, &status, PCI_NUM_INTX) { /* clear interrupts */ cra_writel(pcie, 1 << bit, P2A_INT_STATUS); - virq = irq_find_mapping(pcie->irq_domain, bit + 1); + virq = irq_find_mapping(pcie->irq_domain, bit); if (virq) generic_handle_irq(virq); else @@ -536,7 +535,7 @@ static int altera_pcie_init_irq_domain(struct altera_pcie *pcie) struct device_node *node = dev->of_node; /* Setup INTx */ - pcie->irq_domain = irq_domain_add_linear(node, INTX_NUM + 1, + pcie->irq_domain = irq_domain_add_linear(node, PCI_NUM_INTX, &intx_domain_ops, pcie); if (!pcie->irq_domain) { dev_err(dev, "Failed to get a INTx IRQ domain\n");