From patchwork Thu Aug 17 11:06:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 9905679 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id F2BD960386 for ; Thu, 17 Aug 2017 11:06:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D9CF528ADC for ; Thu, 17 Aug 2017 11:06:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CDFC528ADF; Thu, 17 Aug 2017 11:06:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6634128ADC for ; Thu, 17 Aug 2017 11:06:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751574AbdHQLGT (ORCPT ); Thu, 17 Aug 2017 07:06:19 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:33415 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751167AbdHQLGR (ORCPT ); Thu, 17 Aug 2017 07:06:17 -0400 Received: by mail-wr0-f195.google.com with SMTP id n88so7807498wrb.0; Thu, 17 Aug 2017 04:06:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lHATfdlsiRFXMZri6+h6xhyWq5qwZEnmUjmqWUOPi1A=; b=nKc/1AcfUNeIB3GX1yC0gqYyFT3h5hbPjsIkBcjv7l0phyg8Sc2P5Qb5fX2wIzzBWb Hjy1VZrrL1Hyp7l4H7vMoNbn6Hp0dWCMbve2g+wVBrFO7m39wM5nL9nFJnG2Ca3xGuCI D9bB8WynrsoKauVvJJfTF5T7I5v5crOnSQAwIlm8CRMbHhnD2n4/eqZGRmTM/JGrtmnM r1yTCWrugphDE2krTRVCPKTnBh0K9NTX0v31kJ2eoWEszHVcfj6PrTt4D+Jcr1Id7gAq ylQlzUIZ1SBqtjtqG+pjTxXF/w2UhML9ew7lnX58nrAq3bGPpbLxdjpi1EB63NKca8yk zPvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lHATfdlsiRFXMZri6+h6xhyWq5qwZEnmUjmqWUOPi1A=; b=L1hZeDghoiRrK84id9dlKowbk25JZdsFI5rjiwRXASiYhnX+N0AqapN+91tDi9gk/6 oYDnOrUOvSu+5RS6eBCwgLJyAm/1gMmWSQev+D3hYN7EEFYdJxKoL43yZpiv6jXIdz85 aldR4DufX7e70BaRmRlGK49aXgpAJuZAj79zpm3vbOEOBZJmiKFs/UH5Z3ENBpSDIIZk /Fmq6fBpXOnHef/54Um81hLK8flMMk5SSrIQOIcOFeFk9vzSKZBYrk4pa8V770dbjPAg eEhnbaecVhf54idy3wz6FwpBw97NPPQI0x3Lf9Y4e2hC5bJLWZKuyuOM/wPU1i8yxmRX 92UA== X-Gm-Message-State: AHYfb5hyGn7X56/fWMZ9emiYSFuQP77EPZUX4Gd7t8rIZAVxAEGWrztC 2nbFhwuUl3Oldg== X-Received: by 10.223.148.162 with SMTP id 31mr3341910wrr.28.1502967976175; Thu, 17 Aug 2017 04:06:16 -0700 (PDT) Received: from localhost (p200300E41BD5E00076D02BFFFE273F51.dip0.t-ipconnect.de. [2003:e4:1bd5:e000:76d0:2bff:fe27:3f51]) by smtp.gmail.com with ESMTPSA id o7sm778094wra.39.2017.08.17.04.06.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 17 Aug 2017 04:06:15 -0700 (PDT) From: Thierry Reding To: David Miller , Bjorn Helgaas , Ding Tianhong , Michael Ellerman Cc: leedom@chelsio.com, ashok.raj@intel.com, werner@chelsio.com, ganeshgr@chelsio.com, asit.k.mallick@intel.com, patrick.j.cramer@intel.com, Suravee.Suthikulpanit@amd.com, Bob.Shaw@amd.com, l.stach@pengutronix.de, amira@mellanox.com, gabriele.paoloni@huawei.com, David.Laight@aculab.com, jeffrey.t.kirsher@intel.com, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, robin.murphy@arm.com, alexander.duyck@gmail.com, eric.dumazet@gmail.com, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linuxarm@huawei.com Subject: [PATCH] PCI: Allow PCI express root ports to find themselves Date: Thu, 17 Aug 2017 13:06:14 +0200 Message-Id: <20170817110614.11454-1-thierry.reding@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <1502936730-7368-1-git-send-email-dingtianhong@huawei.com> References: <1502936730-7368-1-git-send-email-dingtianhong@huawei.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding If the pci_find_pcie_root_port() function is called on a root port itself, return the root port rather than NULL. This effectively reverts commit 0e405232871d6 ("PCI: fix oops when try to find Root Port for a PCI device") which added an extra check that would now be redundant. Fixes: a99b646afa8a ("PCI: Disable PCIe Relaxed Ordering if unsupported") Fixes: c56d4450eb68 ("PCI: Turn off Request Attributes to avoid Chelsio T5 Completion erratum") Signed-off-by: Thierry Reding Acked-by: Bjorn Helgaas Tested-by: Shawn Lin --- This applies on top of and was tested on next-20170817. Michael, it'd be great if you could test this one again to clarify whether or not the fix that's already in Linus' tree is still needed, or whether it's indeed obsoleted by this patch. drivers/pci/pci.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b05c587e335a..dd56c1c05614 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -514,7 +514,7 @@ EXPORT_SYMBOL(pci_find_resource); */ struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev) { - struct pci_dev *bridge, *highest_pcie_bridge = NULL; + struct pci_dev *bridge, *highest_pcie_bridge = dev; bridge = pci_upstream_bridge(dev); while (bridge && pci_is_pcie(bridge)) { @@ -522,11 +522,10 @@ struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev) bridge = pci_upstream_bridge(bridge); } - if (highest_pcie_bridge && - pci_pcie_type(highest_pcie_bridge) == PCI_EXP_TYPE_ROOT_PORT) - return highest_pcie_bridge; + if (pci_pcie_type(highest_pcie_bridge) != PCI_EXP_TYPE_ROOT_PORT) + return NULL; - return NULL; + return highest_pcie_bridge; } EXPORT_SYMBOL(pci_find_pcie_root_port);