From patchwork Fri Oct 6 14:04:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 9989573 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 23EF9603FA for ; Fri, 6 Oct 2017 14:10:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0780728DBA for ; Fri, 6 Oct 2017 14:10:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F033528DBF; Fri, 6 Oct 2017 14:10:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A257C28DBE for ; Fri, 6 Oct 2017 14:10:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751868AbdJFOKb (ORCPT ); Fri, 6 Oct 2017 10:10:31 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:7502 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751846AbdJFOKa (ORCPT ); Fri, 6 Oct 2017 10:10:30 -0400 Received: from 172.30.72.58 (EHLO DGGEMS403-HUB.china.huawei.com) ([172.30.72.58]) by dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DIO33673; Fri, 06 Oct 2017 22:10:27 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.301.0; Fri, 6 Oct 2017 22:07:36 +0800 From: Shameer Kolothum To: , , , , , , , CC: , , , , , , , , , Shameer Kolothum Subject: [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3 Date: Fri, 6 Oct 2017 15:04:50 +0100 Message-ID: <20171006140450.89652-5-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20171006140450.89652-1-shameerali.kolothum.thodi@huawei.com> References: <20171006140450.89652-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.59D78ED4.0071, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: d42ebc258cbaf14df7ac8952d549471a Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The HiSilicon erratum 161010801 describes the limitation of HiSilicon platforms hip06/hip07 to support the SMMUv3 mappings for MSI transactions. PCIe controller on these platforms has to differentiate the MSI payload against other DMA payload and has to modify the MSI payload. This basically makes it difficult for this platforms to have a SMMU translation for MSI. In order to workaround this, ARM SMMUv3 driver requires a quirk to treat the MSI regions separately. Such a quirk is currently missing for DT based systems and therefore we need to blacklist the hip06/hip07 PCIe controllers. Signed-off-by: Shameer Kolothum Acked-by: Gabriele Paoloni Acked-by: Zhou Wang Acked-by: Bjorn Helgaas --- drivers/pci/dwc/pcie-hisi.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c index a201791..6800747 100644 --- a/drivers/pci/dwc/pcie-hisi.c +++ b/drivers/pci/dwc/pcie-hisi.c @@ -270,6 +270,12 @@ static int hisi_pcie_probe(struct platform_device *pdev) struct resource *reg; int ret; + if ((IS_BUILTIN(CONFIG_ARM_SMMU_V3)) && + of_property_read_bool(dev->of_node, "iommu-map")) { + dev_warn(dev, "HiSilicon erratum 161010801: blacklisting PCIe controllers behind SMMUv3\n"); + return -ENODEV; + } + hisi_pcie = devm_kzalloc(dev, sizeof(*hisi_pcie), GFP_KERNEL); if (!hisi_pcie) return -ENOMEM; @@ -340,6 +346,12 @@ static int hisi_pcie_almost_ecam_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct pci_ecam_ops *ops; + if ((IS_BUILTIN(CONFIG_ARM_SMMU_V3)) && + of_property_read_bool(dev->of_node, "iommu-map")) { + dev_warn(dev, "HiSilicon erratum 161010801: blacklisting PCIe controllers behind SMMUv3\n"); + return -ENODEV; + } + ops = (struct pci_ecam_ops *)of_device_get_match_data(dev); return pci_host_common_probe(pdev, ops); }