From patchwork Wed Oct 18 13:58:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 10014763 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5510F60211 for ; Wed, 18 Oct 2017 14:00:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4B26A28722 for ; Wed, 18 Oct 2017 14:00:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3FC9128B5E; Wed, 18 Oct 2017 14:00:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1BC4528A2C for ; Wed, 18 Oct 2017 14:00:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754349AbdJROAP (ORCPT ); Wed, 18 Oct 2017 10:00:15 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:54829 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753458AbdJRN63 (ORCPT ); Wed, 18 Oct 2017 09:58:29 -0400 Received: by mail-wr0-f193.google.com with SMTP id o44so5122837wrf.11; Wed, 18 Oct 2017 06:58:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=l2sLUKpgXvRZcY1mRaVccP+nbfhI/wPE9taDk4Skaps=; b=RzMaDSQX5XjL2vkyvCo+axpwchUp8cVPyoAWe1OlzDnltvFCAwF5cEqBJsiqt+5iUb nhy8JU32J5geCcYQZBHB4vWvzV3m4+UJQ1ByFd/AIKya7hxPyi31z+hPbkWwDvsNrPtN BcsVlEcx2ebJq0u6Tf4YwzUje0vJr0sRYFycDasj+VxKIYmevjEC15k5jbrsJ07pMQsq 6RIEyN//ySW1UPbfLcT7XQ2FACN2njavTzc2sn4G7xqzDRIauZ4ybLGLMwuPxNQM5foz 7mHnolDUb1Uj3Gad9fF9a7BgaSzGgXvl6ZIa1TiHu3YslJSK7qQUy8YdaeBis/hlxnay fPNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=l2sLUKpgXvRZcY1mRaVccP+nbfhI/wPE9taDk4Skaps=; b=OT5XDDzmnMBDduW3SRGkgILdtNs5eDL3PSK5A1C6PzQ69qzGVBUFTbLtM3lesCu9b3 mu+7r9jpFDhLo4dPMxkL8cGoYwgzyr+SUafGyjRXuNgTicbGLJJHCyQNQ+pGXhSRHjMb IFt46809owdZPEc0TgFDIOtCQlYGuKAyE5AdbSNfCbIBxoiv0x6ZjiieL709BZGPYMdf 6P4ajzkLPR9m9wOdXOgtJnJ3rGzoL399LHR3TKGSKbzo2wMhr9AAjIjmRuZ4lBRWHH0X r9LSiFXoXEGU36ankoGawMwICun9cEseyg+HIdAvWNX6BNlxkqFR8eD4jroaIcPKpfca AVKA== X-Gm-Message-State: AMCzsaWCOkmFYG1F6jXZQgdEb+V1CprtUbwnPevoOjmoqOerhkt0YYa/ pCO8CNC4spqGjyOrGOONg2A= X-Google-Smtp-Source: ABhQp+RgHSPJPJtw8ENvZ0PdJeU8BbE7pdKz/g3/4ycgvPkU9HNUIJxXpQfLev1gfK4MlQPNYNIHow== X-Received: by 10.223.191.10 with SMTP id p10mr1710801wrh.127.1508335107941; Wed, 18 Oct 2017 06:58:27 -0700 (PDT) Received: from localhost.localdomain ([2a02:908:1251:7981:4537:45bc:69b6:7f1e]) by smtp.gmail.com with ESMTPSA id o24sm15780699wmi.39.2017.10.18.06.58.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 18 Oct 2017 06:58:27 -0700 (PDT) From: "=?UTF-8?q?Christian=20K=C3=B6nig?=" X-Google-Original-From: =?UTF-8?q?Christian=20K=C3=B6nig?= To: helgaas@kernel.org, linux-pci@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org Subject: [PATCH v9 2/5] PCI: add resizeable BAR infrastructure v5 Date: Wed, 18 Oct 2017 15:58:18 +0200 Message-Id: <20171018135821.3248-3-deathsimple@vodafone.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171018135821.3248-1-deathsimple@vodafone.de> References: <20171018135821.3248-1-deathsimple@vodafone.de> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Christian König Just the defines and helper functions to read the possible sizes of a BAR and update it's size. See https://pcisig.com/sites/default/files/specification_documents/ECN_Resizable-BAR_24Apr2008.pdf and PCIe r3.1, sec 7.22. This is useful for hardware with large local storage (mostly GFX) which only expose 256MB BARs initially to be compatible with 32bit systems. v2: provide read helper as well v3: improve function names, use unsigned values, add better comments. v4: move definition, improve commit message, s/bar/BAR/ v5: split out helper to find ctrl reg pos, style fixes, comment fixes, add pci_rbar_size_to_bytes as well Signed-off-by: Christian König Reviewed-by: Andy Shevchenko --- drivers/pci/pci.c | 104 ++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci.h | 8 ++++ include/uapi/linux/pci_regs.h | 11 ++++- 3 files changed, 121 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b4b7eab29400..3aca7393c43c 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2957,6 +2957,110 @@ bool pci_acs_path_enabled(struct pci_dev *start, } /** + * pci_rbar_find_pos - find position of resize ctrl reg for BAR + * @dev: PCI device + * @bar: BAR to find + * + * Helper to find the postion of the ctrl register for a BAR. + * Returns -ENOTSUPP of resizeable BARs are not supported at all. + * Returns -ENOENT if not ctrl register for the BAR could be found. + */ +static int pci_rbar_find_pos(struct pci_dev *pdev, int bar) +{ + unsigned int pos, nbars; + unsigned int i; + u32 ctrl; + + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR); + if (!pos) + return -ENOTSUPP; + + pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); + nbars = (ctrl & PCI_REBAR_CTRL_NBAR_MASK) >> PCI_REBAR_CTRL_NBAR_SHIFT; + + for (i = 0; i < nbars; ++i, pos += 8) { + int bar_idx; + + pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); + bar_idx = (ctrl & PCI_REBAR_CTRL_BAR_IDX_MASK) >> + PCI_REBAR_CTRL_BAR_IDX_SHIFT; + if (bar_idx == bar) + return pos; + } + + return -ENOENT; +} + +/** + * pci_rbar_get_possible_sizes - get possible sizes for BAR + * @dev: PCI device + * @bar: BAR to query + * + * Get the possible sizes of a resizeable BAR as bitmask defined in the spec + * (bit 0=1MB, bit 19=512GB). Returns 0 if BAR isn't resizeable. + */ +u32 pci_rbar_get_possible_sizes(struct pci_dev *pdev, int bar) +{ + u32 cap; + int pos; + + pos = pci_rbar_find_pos(pdev, bar); + if (pos < 0) + return 0; + + pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap); + return (cap & PCI_REBAR_CTRL_SIZES_MASK) >> + PCI_REBAR_CTRL_SIZES_SHIFT; +} + +/** + * pci_rbar_get_current_size - get the current size of a BAR + * @dev: PCI device + * @bar: BAR to set size to + * + * Read the size of a BAR from the resizeable BAR config. + * Returns size if found or negative error code. + */ +int pci_rbar_get_current_size(struct pci_dev *pdev, int bar) +{ + u32 ctrl; + int pos; + + pos = pci_rbar_find_pos(pdev, bar); + if (pos < 0) + return pos; + + pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); + return (ctrl & PCI_REBAR_CTRL_BAR_SIZE_MASK) >> + PCI_REBAR_CTRL_BAR_SIZE_SHIFT; +} + +/** + * pci_rbar_set_size - set a new size for a BAR + * @dev: PCI device + * @bar: BAR to set size to + * @size: new size as defined in the spec (0=1MB, 19=512GB) + * + * Set the new size of a BAR as defined in the spec. + * Returns zero if resizing was successful, error code otherwise. + */ +int pci_rbar_set_size(struct pci_dev *pdev, int bar, int size) +{ + u32 ctrl; + int pos; + + pos = pci_rbar_find_pos(pdev, bar); + if (pos < 0) + return pos; + + pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); + ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE_MASK; + ctrl |= size << PCI_REBAR_CTRL_BAR_SIZE_SHIFT; + pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl); + return 0; +} + +/** * pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge * @dev: the PCI device * @pin: the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 5c475edc78c2..1681895366dc 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -368,4 +368,12 @@ int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment, struct resource *res); #endif +u32 pci_rbar_get_possible_sizes(struct pci_dev *pdev, int bar); +int pci_rbar_get_current_size(struct pci_dev *pdev, int bar); +int pci_rbar_set_size(struct pci_dev *pdev, int bar, int size); +static inline u64 pci_rbar_size_to_bytes(int size) +{ + return 1ULL << (size + 20); +} + #endif /* DRIVERS_PCI_H */ diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index c22d3ebaca20..d6a075de6d43 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -943,9 +943,16 @@ #define PCI_SATA_SIZEOF_LONG 16 /* Resizable BARs */ +#define PCI_REBAR_CAP 4 /* capability register */ +#define PCI_REBAR_CTRL_SIZES_MASK (0xFFFFF << 4) /* mask for sizes */ +#define PCI_REBAR_CTRL_SIZES_SHIFT 4 /* shift for sizes */ #define PCI_REBAR_CTRL 8 /* control register */ -#define PCI_REBAR_CTRL_NBAR_MASK (7 << 5) /* mask for # bars */ -#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # bars */ +#define PCI_REBAR_CTRL_BAR_IDX_MASK (7 << 0) /* mask for BAR index */ +#define PCI_REBAR_CTRL_BAR_IDX_SHIFT 0 /* shift for BAR index */ +#define PCI_REBAR_CTRL_NBAR_MASK (7 << 5) /* mask for # BARs */ +#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # BARs */ +#define PCI_REBAR_CTRL_BAR_SIZE_MASK (0x1F << 8) /* mask for BAR size */ +#define PCI_REBAR_CTRL_BAR_SIZE_SHIFT 8 /* shift for BAR size */ /* Dynamic Power Allocation */ #define PCI_DPA_CAP 4 /* capability register */