From patchwork Fri Dec 1 06:13:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10086301 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CE02C6035E for ; Fri, 1 Dec 2017 06:13:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BB5B92A474 for ; Fri, 1 Dec 2017 06:13:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B03512A477; Fri, 1 Dec 2017 06:13:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 63E952A475 for ; Fri, 1 Dec 2017 06:13:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752756AbdLAGNi (ORCPT ); Fri, 1 Dec 2017 01:13:38 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:59149 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752638AbdLAGNf (ORCPT ); Fri, 1 Dec 2017 01:13:35 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id vB16D4vn008406; Fri, 1 Dec 2017 00:13:04 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1512108784; bh=cJ76b5v26c4mtDWRQwgyWbzxZpdVn4l24rVvRMQhShY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tGh6bcSfQJ9Aic/oZ+igAG75SjsqNwpBWJYj/EbuFnjtngKRiPlAYHxNYv7/Qvy0E WkIqbzcpKbMtcSRssjJBeU0CwREZVqaUSnts+HINVGdhY93Tn3OX8B3epF/bX3tyP6 ENig6sB7nC0JKuHsHpKAlu5GL2T4hfDdzX8Gu01s= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vB16D4rV022153; Fri, 1 Dec 2017 00:13:04 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Fri, 1 Dec 2017 00:13:04 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Fri, 1 Dec 2017 00:13:04 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vB16CjTe013757; Fri, 1 Dec 2017 00:13:01 -0600 From: Vignesh R To: Bjorn Helgaas , Rob Herring , Tony Lindgren , Chris Welch CC: Kishon Vijay Abraham I , Lorenzo Pieralisi , , , , , , Vignesh R Subject: [PATCH 4/4] PCI: dwc: pci-dra7xx: Fix legacy IRQ handling Date: Fri, 1 Dec 2017 11:43:11 +0530 Message-ID: <20171201061311.16691-5-vigneshr@ti.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171201061311.16691-1-vigneshr@ti.com> References: <20171201061311.16691-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Legacy INTD IRQ handling is broken on dra7xx due to fact that driver uses hwirq in range of 1-4 for INTA, INTD whereas IRQ domain is of size 4 which is numbered 0-3. Therefore when INTD IRQ line is used with pci-dra7xx driver following warning is seen: WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:342 irq_domain_associate+0x12c/0x1c4 error: hwirq 0x4 is too large for dummy Fix this by using pci_irqd_intx_xlate() helper to translate the INTx 1-4 range into the 0-3 as done in other PCIe drivers. Also, iterate over all the INTx bits and call their respective IRQ handlers before clearing the status register. Suggested-by: Bjorn Helgaas Reported-by: Chris Welch Signed-off-by: Vignesh R --- drivers/pci/dwc/pci-dra7xx.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index 53f721d1cc40..59e8de34cec6 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -226,6 +226,7 @@ static int dra7xx_pcie_intx_map(struct irq_domain *domain, unsigned int irq, static const struct irq_domain_ops intx_domain_ops = { .map = dra7xx_pcie_intx_map, + .xlate = pci_irqd_intx_xlate, }; static int dra7xx_pcie_init_irq_domain(struct pcie_port *pp) @@ -256,7 +257,8 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) struct dra7xx_pcie *dra7xx = arg; struct dw_pcie *pci = dra7xx->pci; struct pcie_port *pp = &pci->pp; - u32 reg; + unsigned long reg; + u32 virq, bit; reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI); @@ -268,8 +270,11 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) case INTB: case INTC: case INTD: - generic_handle_irq(irq_find_mapping(dra7xx->irq_domain, - ffs(reg))); + for_each_set_bit(bit, ®, PCI_NUM_INTX) { + virq = irq_find_mapping(dra7xx->irq_domain, bit); + if (virq) + generic_handle_irq(virq); + } break; }