From patchwork Wed Dec 27 23:25:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 10134323 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2A8CF60388 for ; Wed, 27 Dec 2017 23:25:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 12EC22C388 for ; Wed, 27 Dec 2017 23:25:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 079AB2C883; Wed, 27 Dec 2017 23:25:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2CCC32C388 for ; Wed, 27 Dec 2017 23:25:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752024AbdL0XZn (ORCPT ); Wed, 27 Dec 2017 18:25:43 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:43062 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751963AbdL0XZn (ORCPT ); Wed, 27 Dec 2017 18:25:43 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B8E906081C; Wed, 27 Dec 2017 23:25:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1514417142; bh=p7cXIqjZS8kQ++NA5lrXly6Ncg2y7GT4/ScHjiypGQ8=; h=From:To:Cc:Subject:Date:From; b=YTRKvGSoJ6PahEqiq+ITz5kFx+ewzWGDZSCeMFetY+Il2+t2dU2EpT6kn6WSHfchc hFIESTfpkdPtiMro6rTkd//h2c/bxYR2yFAvB2UndwYAV1fHMqTXdkLNvtYyDcidNd NxmhBXm1SM+vxp4NidoSYF1X2BeKsLfY73tZIYNY= Received: from sboyd-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id DB5516081C; Wed, 27 Dec 2017 23:25:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1514417142; bh=p7cXIqjZS8kQ++NA5lrXly6Ncg2y7GT4/ScHjiypGQ8=; h=From:To:Cc:Subject:Date:From; b=YTRKvGSoJ6PahEqiq+ITz5kFx+ewzWGDZSCeMFetY+Il2+t2dU2EpT6kn6WSHfchc hFIESTfpkdPtiMro6rTkd//h2c/bxYR2yFAvB2UndwYAV1fHMqTXdkLNvtYyDcidNd NxmhBXm1SM+vxp4NidoSYF1X2BeKsLfY73tZIYNY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org DB5516081C Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org From: Stephen Boyd To: Lorenzo Pieralisi Cc: Jingoo Han , Joao Pinto , linux-kernel@vger.kernel.org, Bjorn Helgaas , linux-pci@vger.kernel.org Subject: [PATCH v2] PCI: dwc: Use {upper, lower}_32_bits() macros for clarity Date: Wed, 27 Dec 2017 15:25:40 -0800 Message-Id: <20171227232540.22341-1-sboyd@codeaurora.org> X-Mailer: git-send-email 2.15.0.374.g5f9953d2c365 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We have macros for getting the upper or lower 32 bits of a number. Use them here to shave a couple lines off the code and provide clarity. Signed-off-by: Stephen Boyd --- Changes from v1: * Update dw_msi_setup_msg() too * Reword commit text slightly drivers/pci/dwc/pcie-designware-host.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c index 81e2157a7cfb..454b8d244071 100644 --- a/drivers/pci/dwc/pcie-designware-host.c +++ b/drivers/pci/dwc/pcie-designware-host.c @@ -89,10 +89,8 @@ void dw_pcie_msi_init(struct pcie_port *pp) msi_target = virt_to_phys((void *)pp->msi_data); /* program the msi_data */ - dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, - (u32)(msi_target & 0xffffffff)); - dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, - (u32)(msi_target >> 32 & 0xffffffff)); + dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, lower_32_bits(msi_target)); + dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, upper_32_bits(msi_target)); } static void dw_pcie_msi_clear_irq(struct pcie_port *pp, int irq) @@ -189,8 +187,8 @@ static void dw_msi_setup_msg(struct pcie_port *pp, unsigned int irq, u32 pos) else msi_target = virt_to_phys((void *)pp->msi_data); - msg.address_lo = (u32)(msi_target & 0xffffffff); - msg.address_hi = (u32)(msi_target >> 32 & 0xffffffff); + msg.address_lo = lower_32_bits(msi_target); + msg.address_hi = upper_32_bits(msi_target); if (pp->ops->get_msi_data) msg.data = pp->ops->get_msi_data(pp, pos);