From patchwork Mon Jun 25 21:06:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Deucher X-Patchwork-Id: 10487257 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 14E416038C for ; Mon, 25 Jun 2018 21:06:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 06F0A286A8 for ; Mon, 25 Jun 2018 21:06:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EFEA3286BD; Mon, 25 Jun 2018 21:06:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9DAE9286A8 for ; Mon, 25 Jun 2018 21:06:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750794AbeFYVGT (ORCPT ); Mon, 25 Jun 2018 17:06:19 -0400 Received: from mail-qt0-f193.google.com ([209.85.216.193]:38540 "EHLO mail-qt0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751347AbeFYVGT (ORCPT ); Mon, 25 Jun 2018 17:06:19 -0400 Received: by mail-qt0-f193.google.com with SMTP id c5-v6so2522784qth.5 for ; Mon, 25 Jun 2018 14:06:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+/i4ully6Mfiy8k07rnYOvij2T7zd06klmEDpKcU0u0=; b=Le/r5qOuMR+nEAmZHaLW0FAndBkU8m5iaVbOR5XgvaIIUWk2GVKV6l+021SeKDAT6E ZnwtKwWekzqFMTCwOhn0ljmmyaacqEnaUKTrfzkv86tm/ThysNI0RiHTmbJhTTlMIpMO 5bJthSe1kbCoeY+uti+v1KgAfr4fEk9umoOaW//IOpjU+DOJgsBEJqfJKvds3RUXnquZ v0cw4DwlvSp9M7xlUAUD/4ZUInyyRS6I0RFObTg9NM8LF/RINbz18hnGTGAPu80O2XyE MaKsCgeYHb1aXPzQ9GcpayMb+1JwamVBg107QaP6LFAQZWaVD2G95UI/YbeA2XqIUQYo GGyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+/i4ully6Mfiy8k07rnYOvij2T7zd06klmEDpKcU0u0=; b=cmCiJ+aNPoXCckYZhRfvD486rOzWjycfdCeUNeLmHdfNIOReN0njTwdm/MeUoF6cWo D1f3ez1KVpH6KQnKG2BWCz5pKr/u+c6vJakPysmeuPSglcqFVGjbai2htH8eWSkgqVTr fDsoFRccZi/EEXcu1PGNgOOD+v60EVKSatjy565aTD1WVV45aqKQmbmEEvxt4C0mZ2s/ x0LeVBqsEvaPywYw3ui+sWJaZHNCqEYtVRvogb6ubNh/zILqY8S58vO05E9GDYBDPSt1 7/KicGlnwqtz4WaGobpQwjtVlmOR7FEzsarwPw8dKeXVjggGs38MfbcWkTkrYFxvb3or jtrw== X-Gm-Message-State: APt69E0aPsWBpjWiMuq590gUnNCtDQaqpN4WdsD+7zHpMmDEUvL4tDRz mL/YJ9apSej1wvCN3Wcs0PA= X-Google-Smtp-Source: AAOMgpfw1Y8mEhzZCuh8/sdADtSdl0JN1pUkTE4osy4XKYOeOI8MbemNenweQBHMl31bj0OzxOAdkw== X-Received: by 2002:a0c:f54d:: with SMTP id p13-v6mr12408498qvm.149.1529960778410; Mon, 25 Jun 2018 14:06:18 -0700 (PDT) Received: from localhost.localdomain ([76.1.164.143]) by smtp.gmail.com with ESMTPSA id q13-v6sm4016108qkl.97.2018.06.25.14.06.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 25 Jun 2018 14:06:17 -0700 (PDT) From: Alex Deucher X-Google-Original-From: Alex Deucher To: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, airlied@gmail.com, linux-pci@vger.kernel.org, bhelgaas@google.com Cc: Alex Deucher Subject: [PATCH 2/5] drm/amdgpu: update amd_pcie.h to include gen4 speeds Date: Mon, 25 Jun 2018 16:06:03 -0500 Message-Id: <20180625210606.2736-3-alexander.deucher@amd.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180625210606.2736-1-alexander.deucher@amd.com> References: <20180625210606.2736-1-alexander.deucher@amd.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Internal header used by the driver to specify pcie gen speeds of the asic and chipset. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/include/amd_pcie.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/include/amd_pcie.h b/drivers/gpu/drm/amd/include/amd_pcie.h index 5eb895fd98bf..9cb9ceb4d74d 100644 --- a/drivers/gpu/drm/amd/include/amd_pcie.h +++ b/drivers/gpu/drm/amd/include/amd_pcie.h @@ -27,6 +27,7 @@ #define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 0x00010000 #define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 0x00020000 #define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3 0x00040000 +#define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4 0x00080000 #define CAIL_PCIE_LINK_SPEED_SUPPORT_MASK 0xFFFF0000 #define CAIL_PCIE_LINK_SPEED_SUPPORT_SHIFT 16 @@ -34,6 +35,7 @@ #define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 0x00000001 #define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2 0x00000002 #define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3 0x00000004 +#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN4 0x00000008 #define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_MASK 0x0000FFFF #define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_SHIFT 0