From patchwork Fri Dec 21 07:27:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10740001 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F1CC613A4 for ; Fri, 21 Dec 2018 07:28:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D7D8128329 for ; Fri, 21 Dec 2018 07:28:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CBB862833E; Fri, 21 Dec 2018 07:28:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A8B128329 for ; Fri, 21 Dec 2018 07:28:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388484AbeLUH2P (ORCPT ); Fri, 21 Dec 2018 02:28:15 -0500 Received: from mail-pf1-f196.google.com ([209.85.210.196]:44230 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388415AbeLUH2O (ORCPT ); Fri, 21 Dec 2018 02:28:14 -0500 Received: by mail-pf1-f196.google.com with SMTP id u6so2172378pfh.11; Thu, 20 Dec 2018 23:28:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5ARpz9jknH5H4OT3/qhVId8qmQoNOpINqmDP2FaaZjU=; b=NIAPuSL/hJ9VQhEPvORXCppBEwzMPcpOj+Yz1GdpGMptpcWx6R/lfmtmqP52n7x6NE Y/jNRWGJhUvcF0oks69JriSQNc4Q6xDTQT6Fjn/VsLFiL+sYTznDXO4g4p27zWTzfudR ItnCJqyGMARxqtTyEOSOVdi4pfnje11fMcLawX3vBpuKhfQBlIbmSlcrW/RXPD0xdapR I5oFZvehmIFXXCyOFEpl4FbGq7UDdC+bB3/jomelhAUpNK7YMv53b7wV6vsnbMPFqcXJ tUM0upyMAiRySpzkZeTtBu6ngv7iKvq5euUG9Fg9pEOWWVtvYw+OGcak7W6Ln9Nhtu2g C3VA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5ARpz9jknH5H4OT3/qhVId8qmQoNOpINqmDP2FaaZjU=; b=n/7vH4gSIwa6mhyf+SsnV4Dc2aA+N2edmy5AoO1ojQm74ME8KpacPMuqVezw4vd+pX /6jgOhUS4EKsKrzZk1q+9J/axgnyGGSS3ag8Rk/AayfmN5YpxGzTzdf8kE7zvDlYSaRG dMPuHTD5Xmom8Zvck4bZVw+xbfuW9NSEwyAwUW4UlnoW7xwUiot/7d+6P8vXCNuTY6ta pOZafmqBYy4N+8BGNLuFrYwV28KnTT+JKrfxgryUCVQrWSr3r2onQawjoJWjhqgC8lWA HqpcbEvbYsVenJqJqV+o5N2+LDa48ni+vWMI4yNqh8IVAukGdmAUcqMmq6a6Phz02CKa A2uw== X-Gm-Message-State: AA+aEWbkuM4I3BbOzehEnuSz3sb0ORY+scFQydHfxM83tTRwmtQj27bA h8XYDXjyHGpLK2inkVxgxx4kWrx0 X-Google-Smtp-Source: AFSGD/WHbfSdl51UrygLkZMS8SUXS+WuEQRRNZr7+xB+nhOhArYgwZi+iDHx+rhFP2zfPhYRg/P9+w== X-Received: by 2002:a62:35c7:: with SMTP id c190mr1466498pfa.76.1545377293403; Thu, 20 Dec 2018 23:28:13 -0800 (PST) Received: from squirtle.lan (c-24-22-235-96.hsd1.wa.comcast.net. [24.22.235.96]) by smtp.gmail.com with ESMTPSA id t90sm44971921pfj.23.2018.12.20.23.28.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 20 Dec 2018 23:28:12 -0800 (PST) From: Andrey Smirnov To: linux-pci@vger.kernel.org Cc: Andrey Smirnov , Lorenzo Pieralisi , Bjorn Helgaas , Fabio Estevam , Chris Healy , Lucas Stach , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 18/21] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll() Date: Thu, 20 Dec 2018 23:27:13 -0800 Message-Id: <20181221072716.29017-19-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181221072716.29017-1-andrew.smirnov@gmail.com> References: <20181221072716.29017-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Simplify bit operations in imx6_setup_phy_mpll() by using GENMASK/FIELD_PREP. No functional change intended. Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Signed-off-by: Andrey Smirnov --- drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 38c8e8baa077..678f5fa85e12 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -96,12 +96,10 @@ struct imx6_pcie { /* PHY registers (not memory-mapped) */ #define PCIE_PHY_ATEOVRD 0x10 #define PCIE_PHY_ATEOVRD_EN BIT(2) -#define PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT 0 -#define PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK 0x1 +#define PCIE_PHY_ATEOVRD_REF_CLKDIV BIT(0) #define PCIE_PHY_MPLL_OVRD_IN_LO 0x11 -#define PCIE_PHY_MPLL_MULTIPLIER_SHIFT 2 -#define PCIE_PHY_MPLL_MULTIPLIER_MASK 0x7f +#define PCIE_PHY_MPLL_MULTIPLIER GENMASK(8, 2) #define PCIE_PHY_MPLL_MULTIPLIER_OVRD BIT(9) #define PHY_RX_OVRD_IN_LO 0x1005 @@ -565,16 +563,14 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie) } pcie_phy_read(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, &val); - val &= ~(PCIE_PHY_MPLL_MULTIPLIER_MASK << - PCIE_PHY_MPLL_MULTIPLIER_SHIFT); - val |= mult << PCIE_PHY_MPLL_MULTIPLIER_SHIFT; + val &= ~PCIE_PHY_MPLL_MULTIPLIER; + val |= FIELD_PREP(PCIE_PHY_MPLL_MULTIPLIER, mult); val |= PCIE_PHY_MPLL_MULTIPLIER_OVRD; pcie_phy_write(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, val); pcie_phy_read(imx6_pcie, PCIE_PHY_ATEOVRD, &val); - val &= ~(PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK << - PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT); - val |= div << PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT; + val &= ~PCIE_PHY_ATEOVRD_REF_CLKDIV; + val |= FIELD_PREP(PCIE_PHY_ATEOVRD_REF_CLKDIV, div); val |= PCIE_PHY_ATEOVRD_EN; pcie_phy_write(imx6_pcie, PCIE_PHY_ATEOVRD, val);