From patchwork Thu May 2 17:04:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vidya Sagar X-Patchwork-Id: 10927375 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4B02092A for ; Thu, 2 May 2019 17:04:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 376F21FF28 for ; Thu, 2 May 2019 17:04:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B5F2204FF; Thu, 2 May 2019 17:04:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 96AC0204BF for ; Thu, 2 May 2019 17:04:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726492AbfEBREq (ORCPT ); Thu, 2 May 2019 13:04:46 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:11354 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725962AbfEBREq (ORCPT ); Thu, 2 May 2019 13:04:46 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 02 May 2019 10:04:41 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 02 May 2019 10:04:44 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 02 May 2019 10:04:44 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 2 May 2019 17:04:44 +0000 Received: from HQMAIL108.nvidia.com (172.18.146.13) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 2 May 2019 17:04:34 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Thu, 2 May 2019 17:04:35 +0000 Received: from vidyas-desktop.nvidia.com (Not Verified[10.24.37.38]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 02 May 2019 10:04:34 -0700 From: Vidya Sagar To: , , , , , CC: , , , , , Subject: [PATCH V4 1/2] PCI: dwc: Add API support to de-initialize host Date: Thu, 2 May 2019 22:34:25 +0530 Message-ID: <20190502170426.28688-1-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1556816681; bh=KU92sWXq4K53rDOlHCdvyaqWnJeE7djISnWrJVyYy44=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=dnr+o15REp7Ky9MInLuEg9Ote+2ZG7Dws5xAAjRGOjdol4zzlcnouPO9txwtXtOnJ QyhWjYScgxxXAM2+Z8j05tYLt9pTXN+vlje581E7DqmbBs8A+UOP0nZ8FdC+Kjyjts wzFvWrF/ikuUsMwTY05Gt5GiH/DheOwnYrgEzbUOCX6WR5QEbDirUgeMUEcnyh9iDv KfGIfoN4loEiPTkvsJmoYttT0BGJu/YV6wwF/ezyuAR2oh1HGtV+jGxpGenowxNtNF uuWv2bLxg+btizFEO4BEcqNE88kQ0BwRWTHjwk5Hi0jSmnA1ev59K4LNEqc43xklRI 1zxfEibc8rUjg== Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add an API to group all the tasks to be done to de-initialize host which can then be called by any DesignWare core based driver implementations while adding .remove() support in their respective drivers. Signed-off-by: Vidya Sagar Acked-by: Gustavo Pimentel --- Changes from v3: * Added check if (pci_msi_enabled() && !pp->ops->msi_host_init) before calling dw_pcie_free_msi() API to mimic init path Changes from v2: * Rebased on top of linux-next top of the tree branch Changes from v1: * s/Designware/DesignWare drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++++++ drivers/pci/controller/dwc/pcie-designware.h | 5 +++++ 2 files changed, 13 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 77db32529319..d069e4290180 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -496,6 +496,14 @@ int dw_pcie_host_init(struct pcie_port *pp) return ret; } +void dw_pcie_host_deinit(struct pcie_port *pp) +{ + pci_stop_root_bus(pp->root_bus); + pci_remove_root_bus(pp->root_bus); + if (pci_msi_enabled() && !pp->ops->msi_host_init) + dw_pcie_free_msi(pp); +} + static int dw_pcie_access_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val, bool write) diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index deab426affd3..4f48ec78c7b9 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -348,6 +348,7 @@ void dw_pcie_msi_init(struct pcie_port *pp); void dw_pcie_free_msi(struct pcie_port *pp); void dw_pcie_setup_rc(struct pcie_port *pp); int dw_pcie_host_init(struct pcie_port *pp); +void dw_pcie_host_deinit(struct pcie_port *pp); int dw_pcie_allocate_domains(struct pcie_port *pp); #else static inline irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) @@ -372,6 +373,10 @@ static inline int dw_pcie_host_init(struct pcie_port *pp) return 0; } +static inline void dw_pcie_host_deinit(struct pcie_port *pp) +{ +} + static inline int dw_pcie_allocate_domains(struct pcie_port *pp) { return 0;