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[5.38.218.107]) by smtp.gmail.com with ESMTPSA id ce25sm8822176edb.45.2020.06.09.09.39.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jun 2020 09:39:58 -0700 (PDT) From: refactormyself@gmail.com To: helgaas@kernel.org Cc: Bolarinwa Olayemi Saheed , bjorn@helgaas.com, linux-pci@vger.kernel.org, skhan@linuxfoundation.org Subject: [PATCH 8/8] PCI: Align return value of pcie capability accessors with other accessors Date: Tue, 9 Jun 2020 17:39:50 +0200 Message-Id: <20200609153950.8346-9-refactormyself@gmail.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200609153950.8346-1-refactormyself@gmail.com> References: <20200609153950.8346-1-refactormyself@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bolarinwa Olayemi Saheed The pcie capability accessors can return 0, -EINVAL, or any PCIBIOS_ error code. PCIBIOS_ error codes have positive values. The pci accessor on the other hand can only return 0 or any PCIBIOS_ error code.This inconsistency among these accessor makes it harder for callers to check for errors. Return PCIBIOS_BAD_REGISTER_NUMBER instead of -EINVAL in all pcie capability accessors. Signed-off-by: Bolarinwa Olayemi Saheed Suggested-by: Bjorn Helgaas --- drivers/pci/access.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/access.c b/drivers/pci/access.c index 79c4a2ef269a..cbb3804903a0 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c @@ -409,7 +409,7 @@ int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val) *val = 0; if (pos & 1) - return -EINVAL; + return PCIBIOS_BAD_REGISTER_NUMBER; if (pcie_capability_reg_implemented(dev, pos)) { ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val); @@ -444,7 +444,7 @@ int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val) *val = 0; if (pos & 3) - return -EINVAL; + return PCIBIOS_BAD_REGISTER_NUMBER; if (pcie_capability_reg_implemented(dev, pos)) { ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val); @@ -469,7 +469,7 @@ EXPORT_SYMBOL(pcie_capability_read_dword); int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val) { if (pos & 1) - return -EINVAL; + return PCIBIOS_BAD_REGISTER_NUMBER; if (!pcie_capability_reg_implemented(dev, pos)) return 0; @@ -481,7 +481,7 @@ EXPORT_SYMBOL(pcie_capability_write_word); int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val) { if (pos & 3) - return -EINVAL; + return PCIBIOS_BAD_REGISTER_NUMBER; if (!pcie_capability_reg_implemented(dev, pos)) return 0;