From patchwork Fri Sep 4 07:50:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 11756207 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 47FCF138E for ; Fri, 4 Sep 2020 07:52:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 264CA20791 for ; Fri, 4 Sep 2020 07:52:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="StrS39YH" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729954AbgIDHwi (ORCPT ); Fri, 4 Sep 2020 03:52:38 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:48400 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729949AbgIDHwf (ORCPT ); Fri, 4 Sep 2020 03:52:35 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0847qPi7017951; Fri, 4 Sep 2020 02:52:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1599205945; bh=WksIlAP2St63/dYiNF+cCQGpadcOB7vBxhhFZVaW4Fw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=StrS39YHN4aovHP9lOQJE427nudehnprdpX12+NHjreaTE8Z3pisSROTqCTn/fNcL B7yLPD2xqDNw8wS5s6MTN0liNx5BKPOZphoTT+Akel/yzj+nEP5rNYkPv+8SVVy7f/ IJQi/dlyZmSw0GyrQTn2t6/mKbRMXJ5PVQ3CwNeQ= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0847qPpe004819 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 4 Sep 2020 02:52:25 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 4 Sep 2020 02:52:25 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 4 Sep 2020 02:52:25 -0500 Received: from a0393678-ssd.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0847osNH058796; Fri, 4 Sep 2020 02:52:20 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Jonathan Corbet , Lorenzo Pieralisi , Jon Mason , Dave Jiang , Allen Hubbe , Rob Herring CC: Arnd Bergmann , Greg Kroah-Hartman , Tom Joseph , , , , , Kishon Vijay Abraham I Subject: [PATCH v3 16/17] Documentation: PCI: Add binding documentation for pci-ntb endpoint function Date: Fri, 4 Sep 2020 13:20:51 +0530 Message-ID: <20200904075052.8911-17-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200904075052.8911-1-kishon@ti.com> References: <20200904075052.8911-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add binding documentation for pci-ntb endpoint function that helps in adding and configuring pci-ntb endpoint function. Signed-off-by: Kishon Vijay Abraham I --- .../PCI/endpoint/function/binding/pci-ntb.rst | 38 +++++++++++++++++++ Documentation/PCI/endpoint/index.rst | 1 + 2 files changed, 39 insertions(+) create mode 100644 Documentation/PCI/endpoint/function/binding/pci-ntb.rst diff --git a/Documentation/PCI/endpoint/function/binding/pci-ntb.rst b/Documentation/PCI/endpoint/function/binding/pci-ntb.rst new file mode 100644 index 000000000000..40253d3d5163 --- /dev/null +++ b/Documentation/PCI/endpoint/function/binding/pci-ntb.rst @@ -0,0 +1,38 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================== +PCI NTB Endpoint Function +========================== + +1) Create a subdirectory to pci_epf_ntb directory in configfs. + +Standard EPF Configurable Fields: + +================ =========================================================== +vendorid should be 0x104c +deviceid should be 0xb00d for TI's J721E SoC +revid don't care +progif_code don't care +subclass_code should be 0x00 +baseclass_code should be 0x5 +cache_line_size don't care +subsys_vendor_id don't care +subsys_id don't care +interrupt_pin don't care +msi_interrupts don't care +msix_interrupts don't care +================ =========================================================== + +2) Create a subdirectory to directory created in 1 + +NTB EPF specific configurable fields: + +================ =========================================================== +db_count Number of doorbells; default = 4 +mw1 size of memory window1 +mw2 size of memory window2 +mw3 size of memory window3 +mw4 size of memory window4 +num_mws Number of memory windows; max = 4 +spad_count Number of scratchpad registers; default = 64 +================ =========================================================== diff --git a/Documentation/PCI/endpoint/index.rst b/Documentation/PCI/endpoint/index.rst index ef6861128506..9cb6e5f3c4d5 100644 --- a/Documentation/PCI/endpoint/index.rst +++ b/Documentation/PCI/endpoint/index.rst @@ -14,3 +14,4 @@ PCI Endpoint Framework pci-ntb-function function/binding/pci-test + function/binding/pci-ntb