| Message ID | 20201023195655.11242-2-vidyas@nvidia.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | Add support to handle prefetchable memory | expand |
On Fri, Oct 23, 2020 at 2:57 PM Vidya Sagar <vidyas@nvidia.com> wrote: > > As per PCIe spec r5.0, sec 7.5.1.3.8 only 32-bit BAR registers are defined > for non-prefetchable memory and hence a warning should be reported when > the size of them go beyond 32-bits. > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > drivers/pci/of.c | 5 +++++ > 1 file changed, 5 insertions(+) Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/drivers/pci/of.c b/drivers/pci/of.c index ac24cd5439a9..5ea472ae22ac 100644 --- a/drivers/pci/of.c +++ b/drivers/pci/of.c @@ -556,6 +556,11 @@ static int pci_parse_request_of_pci_ranges(struct device *dev, break; case IORESOURCE_MEM: res_valid |= !(res->flags & IORESOURCE_PREFETCH); + + if (!(res->flags & IORESOURCE_PREFETCH)) + if (upper_32_bits(resource_size(res))) + dev_warn(dev, "Memory resource size exceeds max for 32 bits\n"); + break; } }
As per PCIe spec r5.0, sec 7.5.1.3.8 only 32-bit BAR registers are defined for non-prefetchable memory and hence a warning should be reported when the size of them go beyond 32-bits. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- drivers/pci/of.c | 5 +++++ 1 file changed, 5 insertions(+)