diff mbox series

[4/5] PCI/ACPI: Centralize pcie_ports_native checking

Message ID 20201126011816.711106-5-helgaas@kernel.org (mailing list archive)
State New
Delegated to: Bjorn Helgaas
Headers show
Series Simplify PCIe native ownership | expand

Commit Message

Bjorn Helgaas Nov. 26, 2020, 1:18 a.m. UTC
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

If the user booted with "pcie_ports=native", we take control of the PCIe
features unconditionally, regardless of what _OSC says.

Centralize the testing of pcie_ports_native in acpi_pci_root_create(),
where we interpret the _OSC results, so other places only have to check
host_bridge->native_X and we don't have to sprinkle tests of
pcie_ports_native everywhere.

[bhelgaas: commit log, rework OSC_PCI_EXPRESS_CONTROL_MASKS, logging]
Link: https://lore.kernel.org/r/bc87c9e675118960949043a832bed86bc22becbd.1603766889.git.sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/acpi/pci_root.c           | 19 +++++++++++++++++++
 drivers/pci/hotplug/pciehp_core.c |  2 +-
 drivers/pci/pci-acpi.c            |  3 ---
 drivers/pci/pcie/aer.c            |  2 +-
 drivers/pci/pcie/portdrv_core.c   |  9 +++------
 5 files changed, 24 insertions(+), 11 deletions(-)

Comments

Kuppuswamy, Sathyanarayanan Nov. 26, 2020, 3:20 a.m. UTC | #1
On 11/25/20 5:18 PM, Bjorn Helgaas wrote:
> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> 
> If the user booted with "pcie_ports=native", we take control of the PCIe
> features unconditionally, regardless of what _OSC says.
> 
> Centralize the testing of pcie_ports_native in acpi_pci_root_create(),
> where we interpret the _OSC results, so other places only have to check
> host_bridge->native_X and we don't have to sprinkle tests of
> pcie_ports_native everywhere.
> 
> [bhelgaas: commit log, rework OSC_PCI_EXPRESS_CONTROL_MASKS, logging]
> Link: https://lore.kernel.org/r/bc87c9e675118960949043a832bed86bc22becbd.1603766889.git.sathyanarayanan.kuppuswamy@linux.intel.com
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> ---
>   drivers/acpi/pci_root.c           | 19 +++++++++++++++++++
>   drivers/pci/hotplug/pciehp_core.c |  2 +-
>   drivers/pci/pci-acpi.c            |  3 ---
>   drivers/pci/pcie/aer.c            |  2 +-
>   drivers/pci/pcie/portdrv_core.c   |  9 +++------
>   5 files changed, 24 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
> index 6db071038fd5..36142ed7b8f8 100644
> --- a/drivers/acpi/pci_root.c
> +++ b/drivers/acpi/pci_root.c
> @@ -882,6 +882,8 @@ static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
>   			flag = 0;	\
>   	} while (0)
>   
> +#define FLAG(x)		((x) ? '+' : '-')
> +
>   struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
>   				     struct acpi_pci_root_ops *ops,
>   				     struct acpi_pci_root_info *info,
> @@ -930,6 +932,23 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
>   	OSC_OWNER(ctrl, OSC_PCI_EXPRESS_LTR_CONTROL, host_bridge->native_ltr);
>   	OSC_OWNER(ctrl, OSC_PCI_EXPRESS_DPC_CONTROL, host_bridge->native_dpc);
>   
> +	if (pcie_ports_native) {
> +		dev_info(&root->device->dev, "Taking control of PCIe-related features because \"pcie_ports=native\" specified; may conflict with firmware\n");
> +		host_bridge->native_pcie_hotplug = 1;
> +		host_bridge->native_aer = 1;
> +		host_bridge->native_pme = 1;
> +		host_bridge->native_ltr = 1;
> +		host_bridge->native_dpc = 1;
> +	}
Won't it be better if its merged with above OSC_OWNER() calls? If pcie_ports_native
is set, then above OSC_OWNER() calls for PCIe related features are redundant. Let me
know.
> +
> +	dev_info(&root->device->dev, "OS native features: SHPCHotplug%c PCIeHotplug%c PME%c AER%c DPC%c LTR%c\n",
> +		FLAG(host_bridge->native_shpc_hotplug),
> +		FLAG(host_bridge->native_pcie_hotplug),
> +		FLAG(host_bridge->native_pme),
> +		FLAG(host_bridge->native_aer),
> +		FLAG(host_bridge->native_dpc),
> +		FLAG(host_bridge->native_ltr));
> +
>   	/*
>   	 * Evaluate the "PCI Boot Configuration" _DSM Function.  If it
>   	 * exists and returns 0, we must preserve any PCI resource
> diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
> index ad3393930ecb..d1831e6bf60a 100644
> --- a/drivers/pci/hotplug/pciehp_core.c
> +++ b/drivers/pci/hotplug/pciehp_core.c
> @@ -256,7 +256,7 @@ static bool pme_is_native(struct pcie_device *dev)
>   	const struct pci_host_bridge *host;
>   
>   	host = pci_find_host_bridge(dev->port->bus);
> -	return pcie_ports_native || host->native_pme;
> +	return host->native_pme;
>   }
>   
>   static void pciehp_disable_interrupt(struct pcie_device *dev)
> diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
> index bf03648c2072..a84f75ec6df8 100644
> --- a/drivers/pci/pci-acpi.c
> +++ b/drivers/pci/pci-acpi.c
> @@ -800,9 +800,6 @@ bool pciehp_is_native(struct pci_dev *bridge)
>   	if (!(slot_cap & PCI_EXP_SLTCAP_HPC))
>   		return false;
>   
> -	if (pcie_ports_native)
> -		return true;
> -
>   	host = pci_find_host_bridge(bridge->bus);
>   	return host->native_pcie_hotplug;
>   }
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index 65dff5f3457a..79bb441139c2 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -219,7 +219,7 @@ int pcie_aer_is_native(struct pci_dev *dev)
>   	if (!dev->aer_cap)
>   		return 0;
>   
> -	return pcie_ports_native || host->native_aer;
> +	return host->native_aer;
>   }
>   
>   int pci_enable_pcie_error_reporting(struct pci_dev *dev)
> diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
> index 50a9522ab07d..2a1190e8db60 100644
> --- a/drivers/pci/pcie/portdrv_core.c
> +++ b/drivers/pci/pcie/portdrv_core.c
> @@ -208,8 +208,7 @@ static int get_port_device_capability(struct pci_dev *dev)
>   	struct pci_host_bridge *host = pci_find_host_bridge(dev->bus);
>   	int services = 0;
>   
> -	if (dev->is_hotplug_bridge &&
> -	    (pcie_ports_native || host->native_pcie_hotplug)) {
> +	if (host->native_pcie_hotplug && dev->is_hotplug_bridge) {
May be this reordering can be split into a different patch ?
>   		services |= PCIE_PORT_SERVICE_HP;
>   
>   		/*
> @@ -221,8 +220,7 @@ static int get_port_device_capability(struct pci_dev *dev)
>   	}
>   
>   #ifdef CONFIG_PCIEAER
> -	if (dev->aer_cap && pci_aer_available() &&
> -	    (pcie_ports_native || host->native_aer)) {
> +	if (host->native_aer && dev->aer_cap && pci_aer_available()) {
same as above.
>   		services |= PCIE_PORT_SERVICE_AER;
>   
>   		/*
> @@ -238,8 +236,7 @@ static int get_port_device_capability(struct pci_dev *dev)
>   	 * Event Collectors can also generate PMEs, but we don't handle
>   	 * those yet.
>   	 */
> -	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
> -	    (pcie_ports_native || host->native_pme)) {
> +	if (host->native_pme && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
>   		services |= PCIE_PORT_SERVICE_PME;
>   
>   		/*
>
Bjorn Helgaas Nov. 28, 2020, 9:45 p.m. UTC | #2
On Wed, Nov 25, 2020 at 07:20:53PM -0800, Kuppuswamy, Sathyanarayanan wrote:
> On 11/25/20 5:18 PM, Bjorn Helgaas wrote:
> > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> > 
> > If the user booted with "pcie_ports=native", we take control of the PCIe
> > features unconditionally, regardless of what _OSC says.
> > 
> > Centralize the testing of pcie_ports_native in acpi_pci_root_create(),
> > where we interpret the _OSC results, so other places only have to check
> > host_bridge->native_X and we don't have to sprinkle tests of
> > pcie_ports_native everywhere.
> > 
> > [bhelgaas: commit log, rework OSC_PCI_EXPRESS_CONTROL_MASKS, logging]
> > Link: https://lore.kernel.org/r/bc87c9e675118960949043a832bed86bc22becbd.1603766889.git.sathyanarayanan.kuppuswamy@linux.intel.com
> > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> > Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> > ---
> >   drivers/acpi/pci_root.c           | 19 +++++++++++++++++++
> >   drivers/pci/hotplug/pciehp_core.c |  2 +-
> >   drivers/pci/pci-acpi.c            |  3 ---
> >   drivers/pci/pcie/aer.c            |  2 +-
> >   drivers/pci/pcie/portdrv_core.c   |  9 +++------
> >   5 files changed, 24 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
> > index 6db071038fd5..36142ed7b8f8 100644
> > --- a/drivers/acpi/pci_root.c
> > +++ b/drivers/acpi/pci_root.c
> > @@ -882,6 +882,8 @@ static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
> >   			flag = 0;	\
> >   	} while (0)
> > +#define FLAG(x)		((x) ? '+' : '-')
> > +
> >   struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
> >   				     struct acpi_pci_root_ops *ops,
> >   				     struct acpi_pci_root_info *info,
> > @@ -930,6 +932,23 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
> >   	OSC_OWNER(ctrl, OSC_PCI_EXPRESS_LTR_CONTROL, host_bridge->native_ltr);
> >   	OSC_OWNER(ctrl, OSC_PCI_EXPRESS_DPC_CONTROL, host_bridge->native_dpc);
> > +	if (pcie_ports_native) {
> > +		dev_info(&root->device->dev, "Taking control of PCIe-related features because \"pcie_ports=native\" specified; may conflict with firmware\n");
> > +		host_bridge->native_pcie_hotplug = 1;
> > +		host_bridge->native_aer = 1;
> > +		host_bridge->native_pme = 1;
> > +		host_bridge->native_ltr = 1;
> > +		host_bridge->native_dpc = 1;
> > +	}
> Won't it be better if its merged with above OSC_OWNER() calls? If
> pcie_ports_native is set, then above OSC_OWNER() calls for PCIe
> related features are redundant. Let me know.

Yes, I think you're right.  I think it would also be nice to know
exactly which services we're overriding _OSC for, i.e., when we turn
native_aer from 0 to 1 and so on.  If we merge this back in, we'll
have a way to keep track of those.

> > @@ -208,8 +208,7 @@ static int get_port_device_capability(struct pci_dev *dev)
> >   	struct pci_host_bridge *host = pci_find_host_bridge(dev->bus);
> >   	int services = 0;
> > -	if (dev->is_hotplug_bridge &&
> > -	    (pcie_ports_native || host->native_pcie_hotplug)) {
> > +	if (host->native_pcie_hotplug && dev->is_hotplug_bridge) {
> May be this reordering can be split into a different patch ?

Good point, that makes the diff a little easier to read, thanks!
diff mbox series

Patch

diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 6db071038fd5..36142ed7b8f8 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -882,6 +882,8 @@  static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
 			flag = 0;	\
 	} while (0)
 
+#define FLAG(x)		((x) ? '+' : '-')
+
 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
 				     struct acpi_pci_root_ops *ops,
 				     struct acpi_pci_root_info *info,
@@ -930,6 +932,23 @@  struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
 	OSC_OWNER(ctrl, OSC_PCI_EXPRESS_LTR_CONTROL, host_bridge->native_ltr);
 	OSC_OWNER(ctrl, OSC_PCI_EXPRESS_DPC_CONTROL, host_bridge->native_dpc);
 
+	if (pcie_ports_native) {
+		dev_info(&root->device->dev, "Taking control of PCIe-related features because \"pcie_ports=native\" specified; may conflict with firmware\n");
+		host_bridge->native_pcie_hotplug = 1;
+		host_bridge->native_aer = 1;
+		host_bridge->native_pme = 1;
+		host_bridge->native_ltr = 1;
+		host_bridge->native_dpc = 1;
+	}
+
+	dev_info(&root->device->dev, "OS native features: SHPCHotplug%c PCIeHotplug%c PME%c AER%c DPC%c LTR%c\n",
+		FLAG(host_bridge->native_shpc_hotplug),
+		FLAG(host_bridge->native_pcie_hotplug),
+		FLAG(host_bridge->native_pme),
+		FLAG(host_bridge->native_aer),
+		FLAG(host_bridge->native_dpc),
+		FLAG(host_bridge->native_ltr));
+
 	/*
 	 * Evaluate the "PCI Boot Configuration" _DSM Function.  If it
 	 * exists and returns 0, we must preserve any PCI resource
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index ad3393930ecb..d1831e6bf60a 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -256,7 +256,7 @@  static bool pme_is_native(struct pcie_device *dev)
 	const struct pci_host_bridge *host;
 
 	host = pci_find_host_bridge(dev->port->bus);
-	return pcie_ports_native || host->native_pme;
+	return host->native_pme;
 }
 
 static void pciehp_disable_interrupt(struct pcie_device *dev)
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index bf03648c2072..a84f75ec6df8 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -800,9 +800,6 @@  bool pciehp_is_native(struct pci_dev *bridge)
 	if (!(slot_cap & PCI_EXP_SLTCAP_HPC))
 		return false;
 
-	if (pcie_ports_native)
-		return true;
-
 	host = pci_find_host_bridge(bridge->bus);
 	return host->native_pcie_hotplug;
 }
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 65dff5f3457a..79bb441139c2 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -219,7 +219,7 @@  int pcie_aer_is_native(struct pci_dev *dev)
 	if (!dev->aer_cap)
 		return 0;
 
-	return pcie_ports_native || host->native_aer;
+	return host->native_aer;
 }
 
 int pci_enable_pcie_error_reporting(struct pci_dev *dev)
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 50a9522ab07d..2a1190e8db60 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -208,8 +208,7 @@  static int get_port_device_capability(struct pci_dev *dev)
 	struct pci_host_bridge *host = pci_find_host_bridge(dev->bus);
 	int services = 0;
 
-	if (dev->is_hotplug_bridge &&
-	    (pcie_ports_native || host->native_pcie_hotplug)) {
+	if (host->native_pcie_hotplug && dev->is_hotplug_bridge) {
 		services |= PCIE_PORT_SERVICE_HP;
 
 		/*
@@ -221,8 +220,7 @@  static int get_port_device_capability(struct pci_dev *dev)
 	}
 
 #ifdef CONFIG_PCIEAER
-	if (dev->aer_cap && pci_aer_available() &&
-	    (pcie_ports_native || host->native_aer)) {
+	if (host->native_aer && dev->aer_cap && pci_aer_available()) {
 		services |= PCIE_PORT_SERVICE_AER;
 
 		/*
@@ -238,8 +236,7 @@  static int get_port_device_capability(struct pci_dev *dev)
 	 * Event Collectors can also generate PMEs, but we don't handle
 	 * those yet.
 	 */
-	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
-	    (pcie_ports_native || host->native_pme)) {
+	if (host->native_pme && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
 		services |= PCIE_PORT_SERVICE_PME;
 
 		/*