From patchwork Thu May 6 15:31:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12242573 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C18FEC43460 for ; Thu, 6 May 2021 15:34:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8DA8F613BA for ; Thu, 6 May 2021 15:34:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235880AbhEFPfm (ORCPT ); Thu, 6 May 2021 11:35:42 -0400 Received: from mail.kernel.org ([198.145.29.99]:46612 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235761AbhEFPeB (ORCPT ); Thu, 6 May 2021 11:34:01 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id BE35E616EC; Thu, 6 May 2021 15:32:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1620315175; bh=/+gs0ZSRDihhAytQvQhC3JU9pmLLRIVi8fOcngMUlsQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BBQZNg72+zIsTIei99cO7gRYKbGHxRUVBO5CGID3UxRoGYu+U85fMo2ixcw6GtMSZ +AJYhmcwD+5KVQJK6NAVIB2WZ2eMp91Y6fiY8/Gja5yIJ9QF/CSWZ2EUT8BfQtgX9J pvpjak348W8hfbPmhJa8KwXcv/XVWB8+3BTdCyvPn3wHrRojMRZncLBtANVl3fjGpJ sq54wrNotp0r3s9rKeERiwtQuwt7lMX6xJBL1alUyiltzld8XyRmfOzUx5xeJn5j0A GetZtoMwAO2cHe9UixL4dihnIMJcTEn3U9dkAp0BBmx0n8MvQkxBR6jg5a9wGIFEsc lKyZtsV/I0IaQ== Received: by pali.im (Postfix) id 75174BF9; Thu, 6 May 2021 17:32:55 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Lorenzo Pieralisi , Thomas Petazzoni , Rob Herring , Bjorn Helgaas Cc: Russell King , =?utf-8?q?Marek_Beh=C3=BAn?= , Remi Pommarel , Xogium , Tomasz Maciej Nowak , Marc Zyngier , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 39/42] PCI: aardvark: Add comments for OB_WIN_ENABLE and ADDR_WIN_DISABLE Date: Thu, 6 May 2021 17:31:50 +0200 Message-Id: <20210506153153.30454-40-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210506153153.30454-1-pali@kernel.org> References: <20210506153153.30454-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add a comment with explanation of these two bits. These comments are taken from U-Boot 2020.10 PCI aardvark driver. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 3c18e139b095..ac3ee48e69d7 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -428,11 +428,24 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK); advk_writel(pcie, reg, HOST_CTRL_INT_MASK_REG); + /* + * Enable AXI address window location generation: + * When it is enabled, the default outbound window + * configurations (Default User Field: 0xD0074CFC) + * are used to transparent address translation for + * the outbound transactions. Thus, PCIe address + * windows are not required. + */ reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); reg |= PCIE_CORE_CTRL2_OB_WIN_ENABLE; advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); - /* Bypass the address window mapping for PIO */ + /* + * Bypass the address window mapping for PIO: + * Since PIO access already contains all required + * info over AXI interface by PIO registers, the + * address window is not required. + */ reg = advk_readl(pcie, PIO_CTRL); reg |= PIO_CTRL_ADDR_WIN_DISABLE; advk_writel(pcie, reg, PIO_CTRL);