| Message ID | 20210825060724.3385929-2-chenhuacai@loongson.cn (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | PCI: Loongson pci improvements and quirks | expand |
Things like "Use correct ..." in subject lines are useless. *Every* patch should do the "proper" or "correct" thing, so it should go without saying. Repeating it doesn't make it more true. This doesn't apply to *all* loongson devices, so it would be useful to hint at the devices it *does* apply to. Maybe something like: PCI: loongson: Use generic 8/16/32-bit config ops on LS2K/LS7A On Wed, Aug 25, 2021 at 02:07:20PM +0800, Huacai Chen wrote: > LS2K/LS7A support 8/16/32-bits pci config access operations via CFG1, so > we can disable CFG0 for them and safely use pci_generic_config_read()/ > pci_generic_config_write() instead of pci_generic_config_read32()/pci_ > generic_config_write32(). s/pci/PCI/ > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> > --- > drivers/pci/controller/pci-loongson.c | 36 +++++++++++++++++---------- > 1 file changed, 23 insertions(+), 13 deletions(-) > > diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c > index 48169b1e3817..b2c81c762599 100644 > --- a/drivers/pci/controller/pci-loongson.c > +++ b/drivers/pci/controller/pci-loongson.c > @@ -159,8 +159,15 @@ static int loongson_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) > return val; > } > > -/* H/w only accept 32-bit PCI operations */ > +/* LS2K/LS7A accept 8/16/32-bit PCI operations */ *config* operations > static struct pci_ops loongson_pci_ops = { > + .map_bus = pci_loongson_map_bus, > + .read = pci_generic_config_read, > + .write = pci_generic_config_write, > +}; > + > +/* RS780/SR5690 only accept 32-bit PCI operations */ > +static struct pci_ops loongson_pci_ops32 = { > .map_bus = pci_loongson_map_bus, > .read = pci_generic_config_read32, > .write = pci_generic_config_write32, > @@ -168,9 +175,9 @@ static struct pci_ops loongson_pci_ops = { > > static const struct of_device_id loongson_pci_of_match[] = { > { .compatible = "loongson,ls2k-pci", > - .data = (void *)(FLAG_CFG0 | FLAG_CFG1 | FLAG_DEV_FIX), }, > + .data = (void *)(FLAG_CFG1 | FLAG_DEV_FIX), }, > { .compatible = "loongson,ls7a-pci", > - .data = (void *)(FLAG_CFG0 | FLAG_CFG1 | FLAG_DEV_FIX), }, > + .data = (void *)(FLAG_CFG1 | FLAG_DEV_FIX), }, > { .compatible = "loongson,rs780e-pci", > .data = (void *)(FLAG_CFG0), }, It'd be nice if you used the same strategy as most other drivers, e.g., ".data = &loongson_ls2k_data" or similar. > {} > @@ -195,17 +202,17 @@ static int loongson_pci_probe(struct platform_device *pdev) > priv->pdev = pdev; > priv->flags = (unsigned long)of_device_get_match_data(dev); > > - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); > - if (!regs) { > - dev_err(dev, "missing mem resources for cfg0\n"); > - return -EINVAL; > + if (priv->flags & FLAG_CFG0) { > + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + if (!regs) > + dev_err(dev, "missing mem resources for cfg0\n"); > + else { > + priv->cfg0_base = devm_pci_remap_cfg_resource(dev, regs); > + if (IS_ERR(priv->cfg0_base)) > + return PTR_ERR(priv->cfg0_base); > + } > } > > - priv->cfg0_base = devm_pci_remap_cfg_resource(dev, regs); > - if (IS_ERR(priv->cfg0_base)) > - return PTR_ERR(priv->cfg0_base); > - > - /* CFG1 is optional */ > if (priv->flags & FLAG_CFG1) { > regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); > if (!regs) > @@ -218,8 +225,11 @@ static int loongson_pci_probe(struct platform_device *pdev) > } > > bridge->sysdata = priv; > - bridge->ops = &loongson_pci_ops; > bridge->map_irq = loongson_map_irq; > + if (!of_device_is_compatible(node, "loongson,rs780e-pci")) You already called of_device_get_match_data() above, which does essentially the same work as of_device_is_compatible(). > + bridge->ops = &loongson_pci_ops; > + else > + bridge->ops = &loongson_pci_ops32; > > return pci_host_probe(bridge); > } > -- > 2.27.0 >
Hi, Bjorn, On Thu, Aug 26, 2021 at 1:32 AM Bjorn Helgaas <helgaas@kernel.org> wrote: > > Things like "Use correct ..." in subject lines are useless. *Every* > patch should do the "proper" or "correct" thing, so it should go > without saying. Repeating it doesn't make it more true. > > This doesn't apply to *all* loongson devices, so it would be useful to > hint at the devices it *does* apply to. > > Maybe something like: > > PCI: loongson: Use generic 8/16/32-bit config ops on LS2K/LS7A > > On Wed, Aug 25, 2021 at 02:07:20PM +0800, Huacai Chen wrote: > > LS2K/LS7A support 8/16/32-bits pci config access operations via CFG1, so > > we can disable CFG0 for them and safely use pci_generic_config_read()/ > > pci_generic_config_write() instead of pci_generic_config_read32()/pci_ > > generic_config_write32(). > > s/pci/PCI/ > > > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> > > --- > > drivers/pci/controller/pci-loongson.c | 36 +++++++++++++++++---------- > > 1 file changed, 23 insertions(+), 13 deletions(-) > > > > diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c > > index 48169b1e3817..b2c81c762599 100644 > > --- a/drivers/pci/controller/pci-loongson.c > > +++ b/drivers/pci/controller/pci-loongson.c > > @@ -159,8 +159,15 @@ static int loongson_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) > > return val; > > } > > > > -/* H/w only accept 32-bit PCI operations */ > > +/* LS2K/LS7A accept 8/16/32-bit PCI operations */ > > *config* operations > > > static struct pci_ops loongson_pci_ops = { > > + .map_bus = pci_loongson_map_bus, > > + .read = pci_generic_config_read, > > + .write = pci_generic_config_write, > > +}; > > + > > +/* RS780/SR5690 only accept 32-bit PCI operations */ > > +static struct pci_ops loongson_pci_ops32 = { > > .map_bus = pci_loongson_map_bus, > > .read = pci_generic_config_read32, > > .write = pci_generic_config_write32, > > @@ -168,9 +175,9 @@ static struct pci_ops loongson_pci_ops = { > > > > static const struct of_device_id loongson_pci_of_match[] = { > > { .compatible = "loongson,ls2k-pci", > > - .data = (void *)(FLAG_CFG0 | FLAG_CFG1 | FLAG_DEV_FIX), }, > > + .data = (void *)(FLAG_CFG1 | FLAG_DEV_FIX), }, > > { .compatible = "loongson,ls7a-pci", > > - .data = (void *)(FLAG_CFG0 | FLAG_CFG1 | FLAG_DEV_FIX), }, > > + .data = (void *)(FLAG_CFG1 | FLAG_DEV_FIX), }, > > { .compatible = "loongson,rs780e-pci", > > .data = (void *)(FLAG_CFG0), }, > > It'd be nice if you used the same strategy as most other drivers, > e.g., ".data = &loongson_ls2k_data" or similar. > > > {} > > @@ -195,17 +202,17 @@ static int loongson_pci_probe(struct platform_device *pdev) > > priv->pdev = pdev; > > priv->flags = (unsigned long)of_device_get_match_data(dev); > > > > - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > - if (!regs) { > > - dev_err(dev, "missing mem resources for cfg0\n"); > > - return -EINVAL; > > + if (priv->flags & FLAG_CFG0) { > > + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > + if (!regs) > > + dev_err(dev, "missing mem resources for cfg0\n"); > > + else { > > + priv->cfg0_base = devm_pci_remap_cfg_resource(dev, regs); > > + if (IS_ERR(priv->cfg0_base)) > > + return PTR_ERR(priv->cfg0_base); > > + } > > } > > > > - priv->cfg0_base = devm_pci_remap_cfg_resource(dev, regs); > > - if (IS_ERR(priv->cfg0_base)) > > - return PTR_ERR(priv->cfg0_base); > > - > > - /* CFG1 is optional */ > > if (priv->flags & FLAG_CFG1) { > > regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); > > if (!regs) > > @@ -218,8 +225,11 @@ static int loongson_pci_probe(struct platform_device *pdev) > > } > > > > bridge->sysdata = priv; > > - bridge->ops = &loongson_pci_ops; > > bridge->map_irq = loongson_map_irq; > > + if (!of_device_is_compatible(node, "loongson,rs780e-pci")) > > You already called of_device_get_match_data() above, which does > essentially the same work as of_device_is_compatible(). OK, thanks, I will update this patch. Huacai > > > + bridge->ops = &loongson_pci_ops; > > + else > > + bridge->ops = &loongson_pci_ops32; > > > > return pci_host_probe(bridge); > > } > > -- > > 2.27.0 > >
diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c index 48169b1e3817..b2c81c762599 100644 --- a/drivers/pci/controller/pci-loongson.c +++ b/drivers/pci/controller/pci-loongson.c @@ -159,8 +159,15 @@ static int loongson_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) return val; } -/* H/w only accept 32-bit PCI operations */ +/* LS2K/LS7A accept 8/16/32-bit PCI operations */ static struct pci_ops loongson_pci_ops = { + .map_bus = pci_loongson_map_bus, + .read = pci_generic_config_read, + .write = pci_generic_config_write, +}; + +/* RS780/SR5690 only accept 32-bit PCI operations */ +static struct pci_ops loongson_pci_ops32 = { .map_bus = pci_loongson_map_bus, .read = pci_generic_config_read32, .write = pci_generic_config_write32, @@ -168,9 +175,9 @@ static struct pci_ops loongson_pci_ops = { static const struct of_device_id loongson_pci_of_match[] = { { .compatible = "loongson,ls2k-pci", - .data = (void *)(FLAG_CFG0 | FLAG_CFG1 | FLAG_DEV_FIX), }, + .data = (void *)(FLAG_CFG1 | FLAG_DEV_FIX), }, { .compatible = "loongson,ls7a-pci", - .data = (void *)(FLAG_CFG0 | FLAG_CFG1 | FLAG_DEV_FIX), }, + .data = (void *)(FLAG_CFG1 | FLAG_DEV_FIX), }, { .compatible = "loongson,rs780e-pci", .data = (void *)(FLAG_CFG0), }, {} @@ -195,17 +202,17 @@ static int loongson_pci_probe(struct platform_device *pdev) priv->pdev = pdev; priv->flags = (unsigned long)of_device_get_match_data(dev); - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!regs) { - dev_err(dev, "missing mem resources for cfg0\n"); - return -EINVAL; + if (priv->flags & FLAG_CFG0) { + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!regs) + dev_err(dev, "missing mem resources for cfg0\n"); + else { + priv->cfg0_base = devm_pci_remap_cfg_resource(dev, regs); + if (IS_ERR(priv->cfg0_base)) + return PTR_ERR(priv->cfg0_base); + } } - priv->cfg0_base = devm_pci_remap_cfg_resource(dev, regs); - if (IS_ERR(priv->cfg0_base)) - return PTR_ERR(priv->cfg0_base); - - /* CFG1 is optional */ if (priv->flags & FLAG_CFG1) { regs = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (!regs) @@ -218,8 +225,11 @@ static int loongson_pci_probe(struct platform_device *pdev) } bridge->sysdata = priv; - bridge->ops = &loongson_pci_ops; bridge->map_irq = loongson_map_irq; + if (!of_device_is_compatible(node, "loongson,rs780e-pci")) + bridge->ops = &loongson_pci_ops; + else + bridge->ops = &loongson_pci_ops32; return pci_host_probe(bridge); }
LS2K/LS7A support 8/16/32-bits pci config access operations via CFG1, so we can disable CFG0 for them and safely use pci_generic_config_read()/ pci_generic_config_write() instead of pci_generic_config_read32()/pci_ generic_config_write32(). Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> --- drivers/pci/controller/pci-loongson.c | 36 +++++++++++++++++---------- 1 file changed, 23 insertions(+), 13 deletions(-)