| Message ID | 20210923172647.72738-10-ben.widawsky@intel.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [v2,1/9] cxl: Convert "RBI" to enum | expand |
On Thu, Sep 23, 2021 at 10:26:47AM -0700, Ben Widawsky wrote: > */ > static int siov_find_pci_dvsec(struct pci_dev *pdev) > { > + return pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_INTEL, 5); > } I hink the siov_find_pci_dvsec helper is pretty pointless now and can be folded into its only caller. And independent of that: this capability really needs a symbolic name. Especially for a vendor like Intel that might have a few there should be a list of them somewhere.
On Thu, Sep 23, 2021 at 10:27 AM Ben Widawsky <ben.widawsky@intel.com> wrote: > > Reduce maintenance burden of DVSEC query implementation by using the > centralized PCI core implementation. > > Cc: iommu@lists.linux-foundation.org > Cc: David Woodhouse <dwmw2@infradead.org> > Cc: Lu Baolu <baolu.lu@linux.intel.com> > Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> > --- > drivers/iommu/intel/iommu.c | 15 +-------------- > 1 file changed, 1 insertion(+), 14 deletions(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index d75f59ae28e6..30c97181f0ae 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -5398,20 +5398,7 @@ static int intel_iommu_disable_sva(struct device *dev) > */ > static int siov_find_pci_dvsec(struct pci_dev *pdev) > { > - int pos; > - u16 vendor, id; > - > - pos = pci_find_next_ext_capability(pdev, 0, 0x23); > - while (pos) { > - pci_read_config_word(pdev, pos + 4, &vendor); > - pci_read_config_word(pdev, pos + 8, &id); > - if (vendor == PCI_VENDOR_ID_INTEL && id == 5) > - return pos; > - > - pos = pci_find_next_ext_capability(pdev, pos, 0x23); > - } > - > - return 0; > + return pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_INTEL, 5); > } Same comments as the CXL patch, siov_find_pci_dvsec() doesn't seem to have a reason to exist anymore. What is 5?
Hi Dan, On 9/29/21 1:54 AM, Dan Williams wrote: > On Thu, Sep 23, 2021 at 10:27 AM Ben Widawsky <ben.widawsky@intel.com> wrote: >> >> Reduce maintenance burden of DVSEC query implementation by using the >> centralized PCI core implementation. >> >> Cc: iommu@lists.linux-foundation.org >> Cc: David Woodhouse <dwmw2@infradead.org> >> Cc: Lu Baolu <baolu.lu@linux.intel.com> >> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> >> --- >> drivers/iommu/intel/iommu.c | 15 +-------------- >> 1 file changed, 1 insertion(+), 14 deletions(-) >> >> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c >> index d75f59ae28e6..30c97181f0ae 100644 >> --- a/drivers/iommu/intel/iommu.c >> +++ b/drivers/iommu/intel/iommu.c >> @@ -5398,20 +5398,7 @@ static int intel_iommu_disable_sva(struct device *dev) >> */ >> static int siov_find_pci_dvsec(struct pci_dev *pdev) >> { >> - int pos; >> - u16 vendor, id; >> - >> - pos = pci_find_next_ext_capability(pdev, 0, 0x23); >> - while (pos) { >> - pci_read_config_word(pdev, pos + 4, &vendor); >> - pci_read_config_word(pdev, pos + 8, &id); >> - if (vendor == PCI_VENDOR_ID_INTEL && id == 5) >> - return pos; >> - >> - pos = pci_find_next_ext_capability(pdev, pos, 0x23); >> - } >> - >> - return 0; >> + return pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_INTEL, 5); >> } > > Same comments as the CXL patch, siov_find_pci_dvsec() doesn't seem to > have a reason to exist anymore. What is 5? "5" is DVSEC ID for Scalable IOV. Anyway, the siov_find_pci_dvsec() has been dead code since commit 262948f8ba57 ("iommu: Delete iommu_dev_has_feature()"). I have a patch to clean it up. No need to care about it in this series. Best regards, baolu
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index d75f59ae28e6..30c97181f0ae 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -5398,20 +5398,7 @@ static int intel_iommu_disable_sva(struct device *dev) */ static int siov_find_pci_dvsec(struct pci_dev *pdev) { - int pos; - u16 vendor, id; - - pos = pci_find_next_ext_capability(pdev, 0, 0x23); - while (pos) { - pci_read_config_word(pdev, pos + 4, &vendor); - pci_read_config_word(pdev, pos + 8, &id); - if (vendor == PCI_VENDOR_ID_INTEL && id == 5) - return pos; - - pos = pci_find_next_ext_capability(pdev, pos, 0x23); - } - - return 0; + return pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_INTEL, 5); } static bool
Reduce maintenance burden of DVSEC query implementation by using the centralized PCI core implementation. Cc: iommu@lists.linux-foundation.org Cc: David Woodhouse <dwmw2@infradead.org> Cc: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> --- drivers/iommu/intel/iommu.c | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-)