From patchwork Fri Sep 24 21:11:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergio Paracuellos X-Patchwork-Id: 12516811 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0C20C433EF for ; Fri, 24 Sep 2021 21:11:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BC95C61029 for ; Fri, 24 Sep 2021 21:11:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348511AbhIXVNX (ORCPT ); Fri, 24 Sep 2021 17:13:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46542 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347064AbhIXVNU (ORCPT ); Fri, 24 Sep 2021 17:13:20 -0400 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3773C061613; Fri, 24 Sep 2021 14:11:46 -0700 (PDT) Received: by mail-wr1-x432.google.com with SMTP id i23so31281284wrb.2; Fri, 24 Sep 2021 14:11:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=67Kcuzs0YKpXx88WCjEGQzyrzMHeJWwzbYlSdV9bf6Q=; b=h++tGSSgJhBX7tDiNX6Qqq1hm8PKJWrjVafbvKhu50yYJ6rEUbg3p4gAHWFhC/E8/c xaiBw9Ws3BhFR7l/v793m+fIDjkH1AyGmGAdcwGOmhvug1NP8P9qdI5NGAnR9wpq8X9u x0Efg42zNIXLzwCcdIWBEaEicvmQyFlCGAVdaHUuayJTuWVlotxhtFXxX8vtV42tDkZd 7hzSuC1DPrkFPBx3vadA+gepFVTx4X0mw4Rm4m294Fj560McDuqoWxH42qOxy7JcRYn6 MUK2XSSxWyFLuRbFBevkl87pROqVo14o+AHTi+OS3CT/x49wDn+uTF3aJuQmgovXaHuN 3M7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=67Kcuzs0YKpXx88WCjEGQzyrzMHeJWwzbYlSdV9bf6Q=; b=FpEad4xYnQgD7ShpGvfwc49Ht3GIRHdz9pJ01CDwREz8qqeVZdxVTYldh4cs0fUJ+s 95k0KEnLUmQI/ZX3//5yxRAZZtsDCw8WDo0HeoYjJnOMOx1fFyoLN/xCmwNVFLYImFzg 3EvNVgc6TzHMb3Qw9PbwhZnmCmLQJAyPrrb+4p4NSmmv05Ymf2pDByAgbOxJc1KpINsq yMqf3QxPbGmwXSZ9zxXdWoYpEgI9PiQHlBueWo2V4QShVupizVT7JuQPYd7wieCNYfuY 8ZG63I6efT6VmcDpkstbqGSFUI8nOE3Dk/Pro6cuAKvOH+PPrBk7vebq+dkUO8e3x7BZ nCRw== X-Gm-Message-State: AOAM533zF673qtWMijskge2BFYOKA0S5rgV07KOyER9ExFLpqp5GozSn piYloA/4iP98Ylifnpn4JaY= X-Google-Smtp-Source: ABdhPJxlgPyjAigRr3IRkrz9jfhRDtCZdzSo9a1pZP1SARM3Z4krfhSVP9ycUKCoQos0C57NnvMcgg== X-Received: by 2002:adf:8919:: with SMTP id s25mr13931537wrs.185.1632517905484; Fri, 24 Sep 2021 14:11:45 -0700 (PDT) Received: from localhost.localdomain (252.red-83-54-181.dynamicip.rima-tde.net. [83.54.181.252]) by smtp.gmail.com with ESMTPSA id y64sm10344297wmc.38.2021.09.24.14.11.44 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 Sep 2021 14:11:45 -0700 (PDT) From: Sergio Paracuellos To: tsbogend@alpha.franken.de Cc: robh@kernel.org, arnd@arndb.de, catalin.marinas@arm.com, Liviu.Dudau@arm.com, bhelgaas@google.com, matthias.bgg@gmail.com, gregkh@linuxfoundation.org, linux-mips@vger.kernel.org, linux-pci@vger.kernel.org, linux-staging@lists.linux.dev, neil@brown.name, linux-kernel@vger.kernel.org Subject: [PATCH 3/6] MIPS: ralink: set PCI_IOBASE to 'mips_io_port_base' Date: Fri, 24 Sep 2021 23:11:36 +0200 Message-Id: <20210924211139.3477-4-sergio.paracuellos@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210924211139.3477-1-sergio.paracuellos@gmail.com> References: <20210924211139.3477-1-sergio.paracuellos@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org By default MIPS architecture use function 'set_io_port_base()' to set the virtual address of the first IO port. This function at the end sets variable 'mips_io_port_base' with the desired address. To align things and allow to change first IO port location address for PCI, set PCI_IOBASE definition as 'mips_io_port_base'. Also, we only need a size of 64 KB. Signed-off-by: Sergio Paracuellos Acked-by: Arnd Bergmann --- arch/mips/include/asm/mach-ralink/spaces.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/mach-ralink/spaces.h b/arch/mips/include/asm/mach-ralink/spaces.h index 87d085c9ad61..05d14c21c417 100644 --- a/arch/mips/include/asm/mach-ralink/spaces.h +++ b/arch/mips/include/asm/mach-ralink/spaces.h @@ -2,8 +2,8 @@ #ifndef __ASM_MACH_RALINK_SPACES_H_ #define __ASM_MACH_RALINK_SPACES_H_ -#define PCI_IOBASE _AC(0xa0000000, UL) -#define PCI_IOSIZE SZ_16M +#define PCI_IOBASE mips_io_port_base +#define PCI_IOSIZE SZ_64K #define IO_SPACE_LIMIT (PCI_IOSIZE - 1) #include