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Sun, 30 Jan 2022 08:15:27 -0800 From: Yishai Hadas To: , , , CC: , , , , , , , , Subject: [PATCH V6 mlx5-next 13/15] vfio/pci: Expose vfio_pci_core_aer_err_detected() Date: Sun, 30 Jan 2022 18:08:24 +0200 Message-ID: <20220130160826.32449-14-yishaih@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20220130160826.32449-1-yishaih@nvidia.com> References: <20220130160826.32449-1-yishaih@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f3da3f58-682f-4151-dd36-08d9e40bbd09 X-MS-TrafficTypeDiagnostic: MN2PR12MB3712:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3968; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: hp02yibww46HRZLpBtFmMMeFAcE+AysJrh1Siw3Tpxtm7jYislY2tbjelmug3/H8WgkVGa2Et4C0xL6bzfHdvQwodxPAjIO1caMZs1ymiz47Cteq5XIPCeRv/31bCNJ5NOn6iUnut0JZ2ZeMTqpJpiVwW6vVlQnORScCd1bqidyhLWekwSX3zhPk1leiUkVZDibOBl+IIMp+ujHf1jMJjkTDmagTTI7roDj7JyKmFM2i2Llgo9VPgRVTUMi2QCES008nr6hdtda3U5lSX1PTsITJ5iVO3LcX34njbwsGhiJ9Z4SR8SSMfXaoL604tZ2wGyujjSZp79/3Im/Hz7k4sj+XFxZuCYD61NQpBrODPLVsfgfnTdC3pXOcZg4Bo5anFgBhAEtL2IMcV7SOURMpsJa4MGcgM4qVYgouA6w49E0q0bgYs3/jc8xgLLAWN1kk8ANEKCtKiLWgwOj6zV9eUhongAZzxE9T43aNzCv7E7NS7TCD9XS1dDOmr8KQHxXtjcQTYmWvPjC18SDDRa/HcUpGZjcr+2yqnKitcI8qjla70Y0ntCRfjEl59uq0qY4na6U9Spp/0dAaJRwt6D6Ixuxpaq9lewEMDLU61uJA3yDciBNWC09Unfe6P6s8RRTDp8HP0Y6rGnZJsMJX+yls1i6lXOM8oqeeWeUfVB0pd+NWewUTnm2xEfhrAbfv46gpCsczyWauZSqm0uCU3SrOlw== X-Forefront-Antispam-Report: CIP:12.22.5.234;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(40470700004)(46966006)(8936002)(8676002)(2906002)(508600001)(356005)(81166007)(316002)(6636002)(54906003)(110136005)(7696005)(6666004)(4326008)(26005)(86362001)(82310400004)(2616005)(40460700003)(107886003)(1076003)(336012)(426003)(186003)(5660300002)(36756003)(70586007)(70206006)(36860700001)(47076005)(83380400001)(36900700001)(20210929001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jan 2022 16:15:31.5543 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3da3f58-682f-4151-dd36-08d9e40bbd09 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.234];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT008.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3712 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Expose vfio_pci_core_aer_err_detected() to be used by drivers as part of their pci_error_handlers structure. Next patch for mlx5 driver will use it. Signed-off-by: Yishai Hadas --- drivers/vfio/pci/vfio_pci_core.c | 7 ++++--- include/linux/vfio_pci_core.h | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index 14a22ff20ef8..69e6d22ae815 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -1865,8 +1865,8 @@ void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev) } EXPORT_SYMBOL_GPL(vfio_pci_core_unregister_device); -static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev, - pci_channel_state_t state) +pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, + pci_channel_state_t state) { struct vfio_pci_core_device *vdev; struct vfio_device *device; @@ -1888,6 +1888,7 @@ static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev, return PCI_ERS_RESULT_CAN_RECOVER; } +EXPORT_SYMBOL_GPL(vfio_pci_core_aer_err_detected); int vfio_pci_core_sriov_configure(struct pci_dev *pdev, int nr_virtfn) { @@ -1910,7 +1911,7 @@ int vfio_pci_core_sriov_configure(struct pci_dev *pdev, int nr_virtfn) EXPORT_SYMBOL_GPL(vfio_pci_core_sriov_configure); const struct pci_error_handlers vfio_pci_core_err_handlers = { - .error_detected = vfio_pci_aer_err_detected, + .error_detected = vfio_pci_core_aer_err_detected, }; EXPORT_SYMBOL_GPL(vfio_pci_core_err_handlers); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index beba0b2ed87d..9f1bf8e49d43 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -232,6 +232,8 @@ int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf); int vfio_pci_core_enable(struct vfio_pci_core_device *vdev); void vfio_pci_core_disable(struct vfio_pci_core_device *vdev); void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev); +pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev, + pci_channel_state_t state); static inline bool vfio_pci_is_vga(struct pci_dev *pdev) {