From patchwork Fri Feb 18 00:55:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Baolu Lu X-Patchwork-Id: 12750837 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87A95C433EF for ; Fri, 18 Feb 2022 00:58:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230366AbiBRA6n (ORCPT ); Thu, 17 Feb 2022 19:58:43 -0500 Received: from gmail-smtp-in.l.google.com ([23.128.96.19]:39572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230435AbiBRA6m (ORCPT ); Thu, 17 Feb 2022 19:58:42 -0500 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F21B33E02; Thu, 17 Feb 2022 16:58:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645145901; x=1676681901; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5wdIObr8WuH+ALl+eS7l5LrC79CgzZrKzlevRIk85ak=; b=DSH26gOdiXGe16QOft9W06KZpYklvCeqymD1+g1FI4KocIKlEdiphuf6 939dz5ivtP9S5bo7A8mEREoF4jaiY3iZGFSOFLN7RAUSfjSqu6VL/pp4+ QqR1m5aqoQuNQnW0ZhxjNo95+2Db2ktwoIqYTP3HCbeav6Xb6IqkxrU3E HahOKi4BPPQLTz3d+okvdK4tgoYEvy3mVKW5dBiX5xjoBWIibZIgAwccc FULB2e6kv9zpEKqQuPiQVCGZ995cYZNeLe2blgEELff9ofZXeEHal4syQ Z6ztA0a865zdw1x+Hn9DtJTVtnE3lxcT48u8euh90SFthwXW3MEEjd1jz Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10261"; a="251216951" X-IronPort-AV: E=Sophos;i="5.88,377,1635231600"; d="scan'208";a="251216951" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Feb 2022 16:57:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,377,1635231600"; d="scan'208";a="637491190" Received: from allen-box.sh.intel.com ([10.239.159.118]) by orsmga004.jf.intel.com with ESMTP; 17 Feb 2022 16:57:30 -0800 From: Lu Baolu To: Greg Kroah-Hartman , Joerg Roedel , Alex Williamson , Bjorn Helgaas , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj Cc: Will Deacon , Robin Murphy , Dan Williams , rafael@kernel.org, Diana Craciun , Cornelia Huck , Eric Auger , Liu Yi L , Jacob jun Pan , Chaitanya Kulkarni , Stuart Yoder , Laurentiu Tudor , Thierry Reding , David Airlie , Daniel Vetter , Jonathan Hunter , Li Yang , Dmitry Osipenko , iommu@lists.linux-foundation.org, linux-pci@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v6 06/11] PCI: portdrv: Set driver_managed_dma Date: Fri, 18 Feb 2022 08:55:16 +0800 Message-Id: <20220218005521.172832-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220218005521.172832-1-baolu.lu@linux.intel.com> References: <20220218005521.172832-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If a switch lacks ACS P2P Request Redirect, a device below the switch can bypass the IOMMU and DMA directly to other devices below the switch, so all the downstream devices must be in the same IOMMU group as the switch itself. The existing VFIO framework allows the portdrv driver to be bound to the bridge while its downstream devices are assigned to user space. The pci_dma_configure() marks the IOMMU group as containing only devices with kernel drivers that manage DMA. Avoid this default behavior for the portdrv driver in order for compatibility with the current VFIO usage. Suggested-by: Jason Gunthorpe Suggested-by: Kevin Tian Signed-off-by: Lu Baolu --- drivers/pci/pcie/portdrv_pci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 35eca6277a96..6b2adb678c21 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -202,6 +202,8 @@ static struct pci_driver pcie_portdriver = { .err_handler = &pcie_portdrv_err_handler, + .driver_managed_dma = true, + .driver.pm = PCIE_PORTDRV_PM_OPS, };