From patchwork Sun Feb 20 19:33:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 12752846 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2F87C433EF for ; Sun, 20 Feb 2022 19:34:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244642AbiBTTeg (ORCPT ); Sun, 20 Feb 2022 14:34:36 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244641AbiBTTef (ORCPT ); Sun, 20 Feb 2022 14:34:35 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54E5E4506C for ; Sun, 20 Feb 2022 11:34:13 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 296AE60EED for ; Sun, 20 Feb 2022 19:34:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AEA42C36AEB; Sun, 20 Feb 2022 19:34:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645385652; bh=4xRhqNt48K7nprT1jQMLHvUB4uFPe+G2W3IIAdLO5Yo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FCbOrNur7fpvVrdhy9P0gCa/ozU+aoxEpd0NryWIQ4E2V7pTLsPNkT00qj0giNcTD ehdrP9MJdFJ+zwxX6kpWX/DuS0cZ2oS+lw+m2DANgktAzt24nNxOmzRyp6UPAT4qv4 mLDWwajBl4jIY9UNAlAOe1IuseLd4SzUwMXr/nawowo+qnp3lbj3DO6RFop4p1hTab 2gb5uFDAKons4C+I40ZqAIb/V/zcbaGJSizoJgSLL91FNG2tFDV8GUWPRLVR8rDzHb KN9FaMShQ0yKHA3xj5iApSz7bxLxE9NuOXtwqf3gamn7/6La7l38b942SNoSQgd/8B Th/ERVz8lvL2w== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Lorenzo Pieralisi , Bjorn Helgaas Cc: =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Marc Zyngier , pali@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Gregory CLEMENT , =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 09/18] PCI: Add PCI_EXP_SLTCTL_ASPL_DISABLE macro Date: Sun, 20 Feb 2022 20:33:37 +0100 Message-Id: <20220220193346.23789-10-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220220193346.23789-1-kabel@kernel.org> References: <20220220193346.23789-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Pali Rohár Add macro defining Auto Slot Power Limit Disable bit in Slot Control Register. Signed-off-by: Pali Rohár Signed-off-by: Marek Behún --- include/uapi/linux/pci_regs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index d825e17e448c..3fc9a4cac630 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -619,6 +619,7 @@ #define PCI_EXP_SLTCTL_PWR_OFF 0x0400 /* Power Off */ #define PCI_EXP_SLTCTL_EIC 0x0800 /* Electromechanical Interlock Control */ #define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */ +#define PCI_EXP_SLTCTL_ASPL_DISABLE 0x2000 /* Auto Slot Power Limit Disable */ #define PCI_EXP_SLTCTL_IBPD_DISABLE 0x4000 /* In-band PD disable */ #define PCI_EXP_SLTSTA 0x1a /* Slot Status */ #define PCI_EXP_SLTSTA_ABP 0x0001 /* Attention Button Pressed */