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Wed, 2 Mar 2022 03:27:16 +0000 From: Frank Li To: gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, linux-imx@nxp.com, linux-pci@vger.kernel.org, lznuaa@gmail.com Cc: vkoul@kernel.org, lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, shawnguo@kernel.org Subject: [PATCH 4/5] PCI: imx6: add PCIe embedded DMA support Date: Tue, 1 Mar 2022 21:26:45 -0600 Message-Id: <20220302032646.3793-4-Frank.Li@nxp.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20220302032646.3793-1-Frank.Li@nxp.com> References: <20220302032646.3793-1-Frank.Li@nxp.com> X-ClientProxiedBy: BYAPR21CA0013.namprd21.prod.outlook.com (2603:10b6:a03:114::23) To PAXPR04MB9186.eurprd04.prod.outlook.com (2603:10a6:102:232::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 87b8a176-1c63-4b85-e38c-08d9fbfc8ce3 X-MS-TrafficTypeDiagnostic: AM6PR04MB5926:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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This enable the DMA controller support. The DMA can transfer data to any remote address location regardless PCI address space size. Prepare struct dw_edma_chip and call dw_edma_probe Signed-off-by: Frank Li --- drivers/pci/controller/dwc/pci-imx6.c | 61 +++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index efa8b81711090..a588b848a1650 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -38,6 +38,7 @@ #include "../../pci.h" #include "pcie-designware.h" +#include "linux/dma/edma.h" #define IMX8MQ_PCIE_LINK_CAP_REG_OFFSET 0x7c #define IMX8MQ_PCIE_LINK_CAP_L1EL_64US GENMASK(18, 17) @@ -164,6 +165,8 @@ struct imx6_pcie { const struct imx6_pcie_drvdata *drvdata; struct regulator *epdev_on; struct phy *phy; + + struct dw_edma_chip dma_chip; }; /* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */ @@ -2031,6 +2034,61 @@ static const struct dw_pcie_ep_ops pcie_ep_ops = { .get_features = imx_pcie_ep_get_features, }; +static int imx_dma_irq_vector(struct device *dev, unsigned int nr) +{ + struct platform_device *pdev = to_platform_device(dev); + + return platform_get_irq_byname(pdev, "dma"); +} + +static struct dw_edma_core_ops dma_ops = { + .irq_vector = imx_dma_irq_vector, +}; + +static int imx_add_pcie_dma(struct imx6_pcie *imx6_pcie, + struct platform_device *pdev, + struct resource *dbi_base) +{ + unsigned int pcie_dma_offset; + struct dw_pcie *pci = imx6_pcie->pci; + struct device *dev = pci->dev; + struct dw_edma_chip *dma = &imx6_pcie->dma_chip; + int i = 0; + u64 pbase; + void *vbase; + int sz = PAGE_SIZE; + + pcie_dma_offset = 0x970; + + pbase = dbi_base->start + pcie_dma_offset; + vbase = pci->dbi_base + pcie_dma_offset; + + dma->dev = dev; + + dma->rg_region.paddr = pbase; + dma->rg_region.vaddr = vbase; + dma->rg_region.sz = 0x424; + + dma->wr_ch_cnt = dma->rd_ch_cnt = 1; + + dma->ops = &dma_ops; + dma->nr_irqs = 1; + + dma->flags = DW_EDMA_CHIP_NO_MSI | DW_EDMA_CHIP_REG32BIT | DW_EDMA_CHIP_LOCAL_EP; + + dma->ll_region_wr[0].sz = sz; + dma->ll_region_wr[0].vaddr = dmam_alloc_coherent(dev, sz, + &dma->ll_region_wr[i].paddr, + GFP_KERNEL); + + dma->ll_region_rd[0].sz = sz; + dma->ll_region_rd[0].vaddr = dmam_alloc_coherent(dev, sz, + &dma->ll_region_rd[i].paddr, + GFP_KERNEL); + + return dw_edma_probe(dma); +} + static int imx_add_pcie_ep(struct imx6_pcie *imx6_pcie, struct platform_device *pdev) { @@ -2694,6 +2752,9 @@ static int imx6_pcie_probe(struct platform_device *pdev) goto err_ret; } + if (imx_add_pcie_dma(imx6_pcie, pdev, dbi_base)) + dev_info(dev, "pci edma probe failure\n"); + return 0; err_ret: