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Thu, 10 Mar 2022 19:25:51 +0000 From: Frank Li To: gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, linux-imx@nxp.com, linux-pci@vger.kernel.org, dmaengine@vger.kernel.org, fancer.lancer@gmail.com, lznuaa@gmail.com Cc: vkoul@kernel.org, lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, shawnguo@kernel.org, manivannan.sadhasivam@linaro.org Subject: [PATCH v5 9/9] PCI: endpoint: functions/pci-epf-test: Support PCI controller DMA Date: Thu, 10 Mar 2022 13:24:57 -0600 Message-Id: <20220310192457.3090-10-Frank.Li@nxp.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20220310192457.3090-1-Frank.Li@nxp.com> References: <20220310192457.3090-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR05CA0051.namprd05.prod.outlook.com (2603:10b6:a03:33f::26) To PAXPR04MB9186.eurprd04.prod.outlook.com (2603:10a6:102:232::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c3369698-1a78-4bd3-2d15-08da02cbc9b8 X-MS-TrafficTypeDiagnostic: DB7PR04MB4858:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 7sIjDg8S3u/DPFtO2nbi5A62ZM68pkcbuibK72C4Z/ZDI65TB04ESsLPOpjbv3BrXIl/uejwn57l78SEkpcA+wlHg608F1xAXVF1i9GUpyiuFu75/DK46fjiWtJFF17UzZgbsyXwLnlDrfmlseKU0NaaM/Vzbe7ivrHwJ0AWhAoWnQbkM8yxt4BTdPi71lga6BHmjQNbiox+XNrm0SzvAXDzt2iYHSFHs6sc/ljJR/l9ltyazGwvh1o3l/bfUQq5mp1qNkeTlnJZmzLqelullSygK2eUo4N3Sz2JZESxXs018pcf6xdFkFv87fl+0zjCjPcnriRgFV+aUK8FIGwA7bmldUpXP/YQelMKo6DJqL27w9cH2pXBljqDTR/vMy+oqykkoDRdG6NyM5Dyhe6Qekx+wnJgMkCMUvlLzvtHOu+Ac0J1VTA5ZkqXOAfa8xJ525wYJsvEhDNNQMH/WXUATTeFxe7mboM1iAtEDWvMVy7a0TFW6ZXs+ZZ3FGs4SugZaP3HH+yIX88RtrRtesbMPGZhAc+jZ9icrIwothtthsZPmc378Q0rkZgD+SeVE8t8+oAwLUY+DSSlkCfOqcjBNH6wS1qW/he1qDQmJdaxlIZnbIrx6eNf/dDDFWWsQlSG1nc8Eo9YuUeqfplQR1sjxhLbriP/1H1naWhrATMyi2/J5+MeUfr02/bQTrECgtKLNccYXAgu30C4g1h7pTrcb8yh2bjwz/2aTrmoHGEgP2uzYJh9dEjQnneUKbkxdXzCb8lQ5Rbgl/6H/ccC79eXorVJh6GX56iZArxCow0PIuvwe2JLC3ySB20W4WMd4ZtkhJ5+e2nO1aWfs2J3p0McJvXULrFF8dBTMVqMwsqmlTMnXSWzT8k869Ws8gcE0iNJCzZw6roRvPdnKcmmGBJuYgCCm3/G1xjb9btymmzpwk6wItYqWASUSWjSFMV5lse3m2Z4kRC1tC2YFs87QSajlayVtMtM2tuO71yhZk1Yeb5H05YNqA1NHze4ozVnWWSRLUAtRKs3XgNNoCPCvfNTwJfyT7+8ErcBS1YVGEelaKxk13gEaidxDCfHiyHX2Q08/4seVU+CSS5LuXzcV38avDOqdrr5qog8MuBOl9EnsGQnAYv8rWAA/iX+YNCE/hyZtJ29gl7otGyliAet0y4G8NINTIMwlP7ZRXtFu2WYQ7OoTAJlbdjs+cGqGcIpTFeEuT2J3oZaibgxOKV4r45bBypbUKp8vZcU3fsuggcqwe8Cher2sOctevwReuwQ1H0IHkmVLFT4tuNrSd+nhEqA3/Jhaa/M6hBwZ+IqwOuHryfCDkiIwA/7iXuc36s0tWd/3+rDHGvRiByrLiaA+FAffbtgYnccp6290+DlZaen1tcr4MiShy/5vp5hKdRLWD577d0iY4jgA8djJ2GTOQdV0XrRhLDHTT5x9+4F3Kj7xpsBI1Qat+ZDMOpI8WydApxZ X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c3369698-1a78-4bd3-2d15-08da02cbc9b8 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9186.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2022 19:25:51.4913 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Z8vDUDcnNwBNT3WDzqbcfTkUt5lCaO4dfoX/Vmkgh7uEjgm8y3YHX4DvW0+Qt7LxXxWQ+s2Q623JI/sRV0Q1uQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB4858 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Designware provided eDMA support in controller. This enabled use this eDMA controller to transfer data. The whole flow align with standard DMA usage module 1. Using dma_request_channel() and filter function to find correct RX and TX Channel. 2. dmaengine_slave_config() config remote side physcial address. 3. using dmaengine_prep_slave_single() create transfer descriptor 4. tx_submit(); 5. dma_async_issue_pending(); Tested at i.MX8DXL platform. root@imx8qmmek:~# /usr/bin/pcitest -d -w WRITE ( 102400 bytes): OKAY root@imx8qmmek:~# /usr/bin/pcitest -d -r READ ( 102400 bytes): OKAY WRITE => Size: 102400 bytes DMA: YES Time: 0.000180145 seconds Rate: 555108 KB/s READ => Size: 102400 bytes DMA: YES Time: 0.000194397 seconds Rate: 514411 KB/s READ => Size: 102400 bytes DMA: NO Time: 0.013532597 seconds Rate: 7389 KB/s WRITE => Size: 102400 bytes DMA: NO Time: 0.000857090 seconds Rate: 116673 KB/s Signed-off-by: Frank Li --- Change from v4 to v5: - none Change from v3 to v4: - reverse Xmas tree order - local -> dma_local - change error message - IS_ERR -> IS_ERR_OR_NULL - check return value of dmaengine_slave_config() Change from v1 to v2: - none drivers/pci/endpoint/functions/pci-epf-test.c | 108 ++++++++++++++++-- 1 file changed, 98 insertions(+), 10 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 90d84d3bc868f..f26afd02f3a86 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -52,9 +52,11 @@ struct pci_epf_test { enum pci_barno test_reg_bar; size_t msix_table_offset; struct delayed_work cmd_handler; - struct dma_chan *dma_chan; + struct dma_chan *dma_chan_tx; + struct dma_chan *dma_chan_rx; struct completion transfer_complete; bool dma_supported; + bool dma_private; const struct pci_epc_features *epc_features; }; @@ -105,12 +107,15 @@ static void pci_epf_test_dma_callback(void *param) */ static int pci_epf_test_data_transfer(struct pci_epf_test *epf_test, dma_addr_t dma_dst, dma_addr_t dma_src, - size_t len) + size_t len, dma_addr_t dma_remote, + enum dma_transfer_direction dir) { + struct dma_chan *chan = (dir == DMA_DEV_TO_MEM) ? epf_test->dma_chan_tx : epf_test->dma_chan_rx; + dma_addr_t dma_local = (dir == DMA_MEM_TO_DEV) ? dma_src : dma_dst; enum dma_ctrl_flags flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; - struct dma_chan *chan = epf_test->dma_chan; struct pci_epf *epf = epf_test->epf; struct dma_async_tx_descriptor *tx; + struct dma_slave_config sconf = {}; struct device *dev = &epf->dev; dma_cookie_t cookie; int ret; @@ -120,7 +125,22 @@ static int pci_epf_test_data_transfer(struct pci_epf_test *epf_test, return -EINVAL; } - tx = dmaengine_prep_dma_memcpy(chan, dma_dst, dma_src, len, flags); + if (epf_test->dma_private) { + sconf.direction = dir; + if (dir == DMA_MEM_TO_DEV) + sconf.dst_addr = dma_remote; + else + sconf.src_addr = dma_remote; + + if (dmaengine_slave_config(chan, &sconf)) { + dev_err(dev, "DMA slave config fail\n"); + return -EIO; + } + tx = dmaengine_prep_slave_single(chan, dma_local, len, dir, flags); + } else { + tx = dmaengine_prep_dma_memcpy(chan, dma_dst, dma_src, len, flags); + } + if (!tx) { dev_err(dev, "Failed to prepare DMA memcpy\n"); return -EIO; @@ -148,6 +168,23 @@ static int pci_epf_test_data_transfer(struct pci_epf_test *epf_test, return 0; } +struct epf_dma_filter { + struct device *dev; + u32 dma_mask; +}; + +static bool epf_dma_filter_fn(struct dma_chan *chan, void *node) +{ + struct epf_dma_filter *filter = node; + struct dma_slave_caps caps; + + memset(&caps, 0, sizeof(caps)); + dma_get_slave_caps(chan, &caps); + + return chan->device->dev == filter->dev + && (filter->dma_mask & caps.directions); +} + /** * pci_epf_test_init_dma_chan() - Function to initialize EPF test DMA channel * @epf_test: the EPF test device that performs data transfer operation @@ -158,10 +195,44 @@ static int pci_epf_test_init_dma_chan(struct pci_epf_test *epf_test) { struct pci_epf *epf = epf_test->epf; struct device *dev = &epf->dev; + struct epf_dma_filter filter; struct dma_chan *dma_chan; dma_cap_mask_t mask; int ret; + filter.dev = epf->epc->dev.parent; + filter.dma_mask = BIT(DMA_DEV_TO_MEM); + + dma_cap_zero(mask); + dma_cap_set(DMA_SLAVE, mask); + dma_chan = dma_request_channel(mask, epf_dma_filter_fn, &filter); + if (IS_ERR_OR_NULL(dma_chan)) { + dev_info(dev, "Failed to get private DMA channel. Falling back to generic one\n"); + goto fail_back_tx; + } + + epf_test->dma_chan_rx = dma_chan; + + filter.dma_mask = BIT(DMA_MEM_TO_DEV); + dma_chan = dma_request_channel(mask, epf_dma_filter_fn, &filter); + + if (IS_ERR(dma_chan)) { + dev_info(dev, "Failed to get private DMA channel. Falling back to generic one\n"); + goto fail_back_rx; + } + + epf_test->dma_chan_tx = dma_chan; + epf_test->dma_private = true; + + init_completion(&epf_test->transfer_complete); + + return 0; + +fail_back_rx: + dma_release_channel(epf_test->dma_chan_rx); + epf_test->dma_chan_tx = NULL; + +fail_back_tx: dma_cap_zero(mask); dma_cap_set(DMA_MEMCPY, mask); @@ -174,7 +245,7 @@ static int pci_epf_test_init_dma_chan(struct pci_epf_test *epf_test) } init_completion(&epf_test->transfer_complete); - epf_test->dma_chan = dma_chan; + epf_test->dma_chan_tx = epf_test->dma_chan_rx = dma_chan; return 0; } @@ -190,8 +261,17 @@ static void pci_epf_test_clean_dma_chan(struct pci_epf_test *epf_test) if (!epf_test->dma_supported) return; - dma_release_channel(epf_test->dma_chan); - epf_test->dma_chan = NULL; + dma_release_channel(epf_test->dma_chan_tx); + if (epf_test->dma_chan_tx == epf_test->dma_chan_rx) { + epf_test->dma_chan_tx = NULL; + epf_test->dma_chan_rx = NULL; + return; + } + + dma_release_channel(epf_test->dma_chan_rx); + epf_test->dma_chan_rx = NULL; + + return; } static void pci_epf_test_print_rate(const char *ops, u64 size, @@ -280,8 +360,14 @@ static int pci_epf_test_copy(struct pci_epf_test *epf_test) goto err_map_addr; } + if (epf_test->dma_private) { + dev_err(dev, "Cannot transfer data using DMA\n"); + ret = -EINVAL; + goto err_map_addr; + } + ret = pci_epf_test_data_transfer(epf_test, dst_phys_addr, - src_phys_addr, reg->size); + src_phys_addr, reg->size, 0, DMA_MEM_TO_MEM); if (ret) dev_err(dev, "Data transfer failed\n"); } else { @@ -363,7 +449,8 @@ static int pci_epf_test_read(struct pci_epf_test *epf_test) ktime_get_ts64(&start); ret = pci_epf_test_data_transfer(epf_test, dst_phys_addr, - phys_addr, reg->size); + phys_addr, reg->size, + reg->src_addr, DMA_DEV_TO_MEM); if (ret) dev_err(dev, "Data transfer failed\n"); ktime_get_ts64(&end); @@ -453,8 +540,9 @@ static int pci_epf_test_write(struct pci_epf_test *epf_test) } ktime_get_ts64(&start); + ret = pci_epf_test_data_transfer(epf_test, phys_addr, - src_phys_addr, reg->size); + src_phys_addr, reg->size, reg->dst_addr, DMA_MEM_TO_DEV); if (ret) dev_err(dev, "Data transfer failed\n"); ktime_get_ts64(&end);