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Thu, 10 Mar 2022 19:25:32 +0000 From: Frank Li To: gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, linux-imx@nxp.com, linux-pci@vger.kernel.org, dmaengine@vger.kernel.org, fancer.lancer@gmail.com, lznuaa@gmail.com Cc: vkoul@kernel.org, lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, shawnguo@kernel.org, manivannan.sadhasivam@linaro.org Subject: [PATCH v5 4/9] dmaengine: dw-edma: rename wr(rd)_ch_cnt to ll_wr(rd)_cnt in struct dw_edma_chip Date: Thu, 10 Mar 2022 13:24:52 -0600 Message-Id: <20220310192457.3090-5-Frank.Li@nxp.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20220310192457.3090-1-Frank.Li@nxp.com> References: <20220310192457.3090-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR05CA0051.namprd05.prod.outlook.com (2603:10b6:a03:33f::26) To PAXPR04MB9186.eurprd04.prod.outlook.com (2603:10a6:102:232::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 234e2d1f-0155-4765-41b1-08da02cbbe95 X-MS-TrafficTypeDiagnostic: DB7PR04MB4858:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: iF2wepOsehL1gfziHmr8aFRapXaGDW9sEz0xFDTVf4jI4J4GeYB4em+ePbRZqSG7He+KJtzme13rK0ro1u9BlKU7x1n3sogejMPzs7GbNhS6twaPw4nxeLurPi+AWfz1er6BCu6x/JTLzyZ5YMlXx1Nw+zz6aS3a08UdfkT69CgCliCye87y8fjDNTGFwrp00NYdOk5TBX/Qi0aurY5+NjRHwLiRv43MmYAPl+B2DlHNDWinLkiWQwQFM1aIYrS990JMtCIhenyJH8b0lwh+reelKUrLfh6Q5ECkwGMvptsSNK5RDR+S/dHWbdK+V6iyIQBdDefzxqZi+z4+gtsXkna+1MzCOBKtqS0M+c0WJAw6ROgaN2iuBad3eciUGNWdSfuKPijZ8+kbniL9o/zmAznRleDPYi6BwKj5OctLAQofqfYsVYyXaXVeyGOgtedrpTryzdIKCWnYAFOcbiaP9d7oSbN7Xp4BiXvk5cbZCeywJ2zLtv+4ZugeE+5e4SO+SdhEZMEOOZcj9affJ+9VBa8vHPkgh2xAKM/YvrnKI2kQGnUJYmiyoFHY0hcxNPfwiUL4/aVP3vhfFuCBFs/4SdOnIwiFq5RDaP4ZcLBrTu9L5zJ+1HYbRcymtXKVhoP22b4fgR2NPW8QM1dCGl8BnzcHIi1AbscsN85qusonSjdWZ4ESVfxR4J5eMpQfwGQob4Tg9Yhjrat8Xmdty3ZRteX/JEPIQuom2OPbCstDup/8y0vpiINSRfbSAkvV5JfD8h+0dNRUgsvGgAbPtj62bev7mP+DzgTACxAWRkLGUHCKxvPoP1KFx1o6Rhw1nmtZj9TvB4iVbXoroDDQUwsbrNvp3To3YXPyv3mExz5ouBFCBxbjz+Cc6CjKAnZbn5JJyKIfREDiu+a2f2lRUYLsxEBBPXuUi8rx1/tDgJHVGA3k7d1KKDx2fGR4IfTZhTScTNlrTV0oHL8YfyHnnK2ckUvE+yZV1mV9pxTcHcOUxq2aIk8Ka9UXfEyN5D71CqUSCyIHSu7vDAf9K7DH6rBCwdJex1f3nGY3PXlEFkeMVpH01dW9aOHYA6dF7fcL4ZjI/UQ1pige0LU5IIya3V9gn2GxijhllQo5ILJh1Tv4yN+DK2K+Cpp2g8nkA9zHhiM1Fj15KlviB0I228A11h9ZT29KyoI+e92w4Ht8dWRuks4yh6bO52cCPXTR4PrPt7cZSwdlkk3568YGnm8v4VPZkpglmJndTqbrOKV8sprHFXj3lfU9fBL0TYt6X8UuKOLLKXzdZBdJx2Tz5q5ZpQT14oHRCxMRj2SQZ9QFyELynASC7gg6yp2Mny/zJqApHsXUGjrW+FPJRojA3Rck/fpw2kmck1TuplWWPFneNoxuPtx9HRQfdWZQVHuQtZSgRoHHpbYHSQzugjvkPbJTTwJvIxop+H/FtIQ+y5Jhj2gvdSro7xyxVtNAWrxjK4QEakuU X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 234e2d1f-0155-4765-41b1-08da02cbbe95 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9186.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2022 19:25:32.6681 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: BqihSayEvOVOIoXFe0jRV4LBUeK7l0y5rQPQYbzXylFMGjOLgJTPIAa4/SfkjclDZDIP4hgEkB8e9nm0yCgMBw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB4858 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org There are same name wr(rd)_ch_cnt in struct dw_edma. EDMA driver get write(read) channel number from register, then save these into dw_edma. Old wr(rd)_ch_cnt in dw_edma_chip actuall means how many link list memory are avaiable in ll_region_wr(rd)[EDMA_MAX_WR_CH]. So rename it to ll_wr(rd)_cnt to indicate actual usage. Signed-off-by: Frank Li Reviewed-by: Serge Semin --- No change since v4 drivers/dma/dw-edma/dw-edma-core.c | 4 ++-- drivers/dma/dw-edma/dw-edma-pcie.c | 12 ++++++------ include/linux/dma/edma.h | 8 ++++---- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c index 2503f1463f07c..3e4850cfa0b72 100644 --- a/drivers/dma/dw-edma/dw-edma-core.c +++ b/drivers/dma/dw-edma/dw-edma-core.c @@ -915,11 +915,11 @@ int dw_edma_probe(struct dw_edma_chip *chip) raw_spin_lock_init(&dw->lock); - dw->wr_ch_cnt = min_t(u16, chip->wr_ch_cnt, + dw->wr_ch_cnt = min_t(u16, chip->ll_wr_cnt, dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE)); dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt, EDMA_MAX_WR_CH); - dw->rd_ch_cnt = min_t(u16, chip->rd_ch_cnt, + dw->rd_ch_cnt = min_t(u16, chip->ll_rd_cnt, dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ)); dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt, EDMA_MAX_RD_CH); diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c index ae42bad24dd5a..7732537f96086 100644 --- a/drivers/dma/dw-edma/dw-edma-pcie.c +++ b/drivers/dma/dw-edma/dw-edma-pcie.c @@ -230,14 +230,14 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, chip->nr_irqs = nr_irqs; chip->ops = &dw_edma_pcie_core_ops; - chip->wr_ch_cnt = vsec_data.wr_ch_cnt; - chip->rd_ch_cnt = vsec_data.rd_ch_cnt; + chip->ll_wr_cnt = vsec_data.wr_ch_cnt; + chip->ll_rd_cnt = vsec_data.rd_ch_cnt; chip->reg_base = pcim_iomap_table(pdev)[vsec_data.rg.bar]; if (!chip->reg_base) return -ENOMEM; - for (i = 0; i < chip->wr_ch_cnt; i++) { + for (i = 0; i < chip->ll_wr_cnt; i++) { struct dw_edma_region *ll_region = &chip->ll_region_wr[i]; struct dw_edma_region *dt_region = &chip->dt_region_wr[i]; struct dw_edma_block *ll_block = &vsec_data.ll_wr[i]; @@ -262,7 +262,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, dt_region->sz = dt_block->sz; } - for (i = 0; i < chip->rd_ch_cnt; i++) { + for (i = 0; i < chip->ll_rd_cnt; i++) { struct dw_edma_region *ll_region = &chip->ll_region_rd[i]; struct dw_edma_region *dt_region = &chip->dt_region_rd[i]; struct dw_edma_block *ll_block = &vsec_data.ll_rd[i]; @@ -302,7 +302,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, chip->reg_base); - for (i = 0; i < chip->wr_ch_cnt; i++) { + for (i = 0; i < chip->ll_wr_cnt; i++) { pci_dbg(pdev, "L. List:\tWRITE CH%.2u, BAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", i, vsec_data.ll_wr[i].bar, vsec_data.ll_wr[i].off, chip->ll_region_wr[i].sz, @@ -314,7 +314,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, chip->dt_region_wr[i].vaddr, &chip->dt_region_wr[i].paddr); } - for (i = 0; i < chip->rd_ch_cnt; i++) { + for (i = 0; i < chip->ll_rd_cnt; i++) { pci_dbg(pdev, "L. List:\tREAD CH%.2u, BAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", i, vsec_data.ll_rd[i].bar, vsec_data.ll_rd[i].off, chip->ll_region_rd[i].sz, diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h index e9ce652b88233..c2039246fc08c 100644 --- a/include/linux/dma/edma.h +++ b/include/linux/dma/edma.h @@ -40,8 +40,8 @@ enum dw_edma_map_format { * @nr_irqs: total dma irq number * @ops DMA channel to IRQ number mapping * @reg_base DMA register base address - * @wr_ch_cnt DMA write channel number - * @rd_ch_cnt DMA read channel number + * @ll_wr_cnt DMA write link list number + * @ll_rd_cnt DMA read link list number * @rg_region DMA register region * @ll_region_wr DMA descriptor link list memory for write channel * @ll_region_rd DMA descriptor link list memory for read channel @@ -56,8 +56,8 @@ struct dw_edma_chip { void __iomem *reg_base; - u16 wr_ch_cnt; - u16 rd_ch_cnt; + u16 ll_wr_cnt; + u16 ll_rd_cnt; /* link list address */ struct dw_edma_region ll_region_wr[EDMA_MAX_WR_CH]; struct dw_edma_region ll_region_rd[EDMA_MAX_RD_CH];