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Thu, 10 Mar 2022 19:25:36 +0000 From: Frank Li To: gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, linux-imx@nxp.com, linux-pci@vger.kernel.org, dmaengine@vger.kernel.org, fancer.lancer@gmail.com, lznuaa@gmail.com Cc: vkoul@kernel.org, lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, shawnguo@kernel.org, manivannan.sadhasivam@linaro.org Subject: [PATCH v5 5/9] dmaengine: dw-edma: Fix programming the source & dest addresses for ep Date: Thu, 10 Mar 2022 13:24:53 -0600 Message-Id: <20220310192457.3090-6-Frank.Li@nxp.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20220310192457.3090-1-Frank.Li@nxp.com> References: <20220310192457.3090-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR05CA0051.namprd05.prod.outlook.com (2603:10b6:a03:33f::26) To PAXPR04MB9186.eurprd04.prod.outlook.com (2603:10a6:102:232::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0b5d1c7f-d82d-4082-cdc5-08da02cbc0c7 X-MS-TrafficTypeDiagnostic: DB7PR04MB4858:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ojccBwwpTdqQUgZhGy15B2a4Wte5mI+uQcrtMRjEJvHW354/wLrOfgImMDBfDkqb1BRshYE+HSo9rEYbJfKVZAWHTIEhg0i70rCEHdYGii1ekQXJy/G9LZc9HDw1hx9CoR3ADZSXCwoOnbbpFM83rSRZ/b1i5K3NlGdvr+RWQSQF59hfZLFtV35xgUBYSMEFxWI4fTtfkY2G7hL3mKSF0GVBdqGSYiZHVh7DtycxPC/Az9PD+XrdvYnSb0/Az2hwwt44lXc8WQ8K9KWoxWEIBcKTLEE1OP6BXCHt0Y5CUq0Ufc87WJBINpykuNViWAMmqg67hhhj4OI+ceKb8Nn3QQ8kR6bf1HmNKaaO41mQEom1kU2645nuWMq2Nh3vCzg2Tbk/rukaePPOociTWqRHs2bmvExtA8L+0YNfjp03dz/pvC7Ke8sPoKE1OP++IpCUNtNg8KwCUgB83PktuyH3WEfhX8OQmzvEP148z9vGDAgLKHmIzGMffogwVDD++PPzH8DTyhl25AAn/6TbnDOy6KmS3MV7UFaJowoJTkorGsLJZ7BaDgKO/pe1J7WDMRN8izC8+yur2X4pq4ciDG32ylqJFBq9zzTUQdyGdred4dTC8C7un3i9luPkmSeaLm9EeLl8F0/aN3pxq11y2AEab6FJmzVZXWU3dPEefS7TnBzApPsT+lhMiuPXKUKuZ9z9gpuLrMQ6GEQQGLrQvk9RsanRjX+AstozVrDDsbS4/QL4dHIxb5M403bMb2xOLXEdU61am8IUhFcg4lxB/gt0huPEU4o7XIDnBrE55er5XEn9LsVuFFrMFMhdSq+DiEo+cGb4/kqrbcb6lUiunSwzSSaGLojax72n/4bVm+5ncJ+9V5aLYbOvL0l+or87eWE4orrUr1f3d0H5ZDp/no6sWuegqdJkbbLee/GITDgLUn1TyIYZzfmitGYJwbuUKHDjcEJEafN4NjGkIv240EUOVdZJWoX5YWkzsq0WBhj3vBZlgJQNhwkjlmM4u9+LcZg1ITWrOV9ANlFAb7oVouixZmkiX5+bGf/RZl8znVLijIcTlAVJUgE/qCSPyVAkkhP/aMpsODZsT/JuLgUVIAGyLVGmEwS58g+rj9qWFH0aUZuaHafSA9S1HSNxmtaNZBlf3E6o1QmC44k4Zez83rL5rcU8fp/qxZ7imX/Z40j+L2xUzgFsh0rYDUnIVOW3PuCqf7Cwb/02OfAGaorMBq/S0CsKZWM47KF5uS+bT7lNQDmRnWW7G1tE1fMrWcvNvIv6tgNZK3Cm/Yr4r7lPQ1DJTB+VkLYSccK4ndq5NoFmWH5bc9550YxXlv2FyOKbvlQ52IX/Jyw7qWRFtT5P+gQUmuGchiXW1C+/palLs2JWTxE9oPUrKJry8S/p6efbXrJ5kVVG+t7ul0AuuTFHvNLggB3jZy/4lECWxJgSnDVIOIq5pHuxOSOXfAHIm35AzgNH X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0b5d1c7f-d82d-4082-cdc5-08da02cbc0c7 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9186.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2022 19:25:36.3532 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: p/c0czBXk5lS/3ITpI142adWdCFT7PZTxwWDH5lI2UCNJ/bxO2pOjsHxMhQTMhh6Jx8JrA/gCQHCWGkK7eY0pQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB4858 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Manivannan Sadhasivam When eDMA is controlled by the Endpoint (EP), the current logic incorrectly programs the source and destination addresses for read and write. Since the Root complex and Endpoint uses the opposite channels for read/write, fix the issue by finding out the read operation first and program the eDMA accordingly. Cc: stable@vger.kernel.org Fixes: bd96f1b2f43a ("dmaengine: dw-edma: support local dma device transfer semantics") Fixes: e63d79d1ffcd ("dmaengine: Add Synopsys eDMA IP core driver") Signed-off-by: Manivannan Sadhasivam Signed-off-by: Frank Li --- drivers/dma/dw-edma/dw-edma-core.c | 32 +++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c index 3e4850cfa0b72..924f220007362 100644 --- a/drivers/dma/dw-edma/dw-edma-core.c +++ b/drivers/dma/dw-edma/dw-edma-core.c @@ -334,6 +334,7 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer) struct dw_edma_chunk *chunk; struct dw_edma_burst *burst; struct dw_edma_desc *desc; + bool read = false; u32 cnt = 0; int i; @@ -424,7 +425,36 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer) chunk->ll_region.sz += burst->sz; desc->alloc_sz += burst->sz; - if (chan->dir == EDMA_DIR_WRITE) { + /**************************************************************** + * + * Root Complex Endpoint + * +-----------------------+ +----------------------+ + * | | TX CH | | + * | | | | + * | DEV_TO_MEM <-------------+ MEM_TO_DEV | + * | | | | + * | | | | + * | MEM_TO_DEV +-------------> DEV_TO_MEM | + * | | | | + * | | RX CH | | + * +-----------------------+ +----------------------+ + * + * If eDMA is controlled by the Root complex, TX channel + * (EDMA_DIR_WRITE) is used for memory read (DEV_TO_MEM) and RX + * channel (EDMA_DIR_READ) is used for memory write (MEM_TO_DEV). + * + * If eDMA is controlled by the endpoint, RX channel + * (EDMA_DIR_READ) is used for memory read (DEV_TO_MEM) and TX + * channel (EDMA_DIR_WRITE) is used for memory write (MEM_TO_DEV). + * + ****************************************************************/ + + if ((dir == DMA_DEV_TO_MEM && chan->dir == EDMA_DIR_READ) || + (dir == DMA_DEV_TO_MEM && chan->dir == EDMA_DIR_WRITE)) + read = true; + + /* Program the source and destination addresses for DMA read/write */ + if (read) { burst->sar = src_addr; if (xfer->type == EDMA_XFER_CYCLIC) { burst->dar = xfer->xfer.cyclic.paddr;