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[1/6] dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC Error

Message ID 20220506134029.21470-2-pali@kernel.org (mailing list archive)
State New
Delegated to: Lorenzo Pieralisi
Headers show
Series PCI: mvebu: Add support for PME and AER interrupts | expand

Commit Message

Pali Rohár May 6, 2022, 1:40 p.m. UTC
Signed-off-by: Pali Rohár <pali@kernel.org>
---
 .../interrupt-controller/marvell,armada-370-xp-mpic.txt  | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Rob Herring May 17, 2022, 12:18 a.m. UTC | #1
On Fri, May 06, 2022 at 03:40:24PM +0200, Pali Rohár wrote:
> Signed-off-by: Pali Rohár <pali@kernel.org>

Why do we need/want this change?

> ---
>  .../interrupt-controller/marvell,armada-370-xp-mpic.txt  | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> index 5fc03134a999..8cddbc16ddbd 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> @@ -24,6 +24,11 @@ Optional properties:
>    connected as a slave to the Cortex-A9 GIC. The provided interrupt
>    indicate to which GIC interrupt the MPIC output is connected.
>  
> +Optional subnodes:
> +
> +- interrupt-controller@20 with interrupt-controller property for
> +  MPIC SoC Error IRQ controller
> +
>  Example:
>  
>          mpic: interrupt-controller@d0020000 {
> @@ -35,4 +40,8 @@ Example:
>                msi-controller;
>                reg = <0xd0020a00 0x1d0>,
>                      <0xd0021070 0x58>;
> +              soc_err: interrupt-controller@20 {

unit address without 'reg' is an error.

> +                    interrupt-controller;
> +                    #interrupt-cells = <1>;
> +              };
>          };
> -- 
> 2.20.1
> 
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
index 5fc03134a999..8cddbc16ddbd 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
@@ -24,6 +24,11 @@  Optional properties:
   connected as a slave to the Cortex-A9 GIC. The provided interrupt
   indicate to which GIC interrupt the MPIC output is connected.
 
+Optional subnodes:
+
+- interrupt-controller@20 with interrupt-controller property for
+  MPIC SoC Error IRQ controller
+
 Example:
 
         mpic: interrupt-controller@d0020000 {
@@ -35,4 +40,8 @@  Example:
               msi-controller;
               reg = <0xd0020a00 0x1d0>,
                     <0xd0021070 0x58>;
+              soc_err: interrupt-controller@20 {
+                    interrupt-controller;
+                    #interrupt-cells = <1>;
+              };
         };