| Message ID | 20220822184701.25246-6-Sergey.Semin@baikalelectronics.ru (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | PCI: dwc: Add generic resources and Baikal-T1 support | expand |
On Mon, 22 Aug 2022 21:46:46 +0300, Serge Semin wrote: > It's normal to have the DW PCIe RP/EP DT-nodes equipped with the explicit > PHY phandle references. There can be up to 16 PHYs attach in accordance > with the maximum number of supported PCIe lanes. Let's extend the common > DW PCIe controller schema with the 'phys' and 'phy-names' properties > definition. The PHY names are defined with the regexp pattern > '^pcie([0-9]+|-?phy[0-9]*)?$' so to match the names currently supported by > the DW PCIe platform drivers ("pcie": meson; "pciephy": qcom, imx6; > "pcie-phy": uniphier, rockchip, spear13xx; "pcie": intel-gw; "pcie-phy%d": > keystone, dra7xx; "pcie": histb, etc). Though the "pcie%d" format would > the most preferable in this case. > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > --- > > Changelog v3: > - This is a new patch unpinned from the next one: > https://lore.kernel.org/linux-pci/20220503214638.1895-2-Sergey.Semin@baikalelectronics.ru/ > by the Rob' request. (@Rob) > > Changelog v5: > - Add a note about having line-based PHY phandles order. (@Rob) > - Prefer 'pcie[0-9]+' PHY-names over the rest of the cases. (@Rob) > --- > .../bindings/pci/snps,dw-pcie-common.yaml | 19 +++++++++++++++++++ > .../bindings/pci/snps,dw-pcie-ep.yaml | 3 +++ > .../devicetree/bindings/pci/snps,dw-pcie.yaml | 3 +++ > 3 files changed, 25 insertions(+) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@14180000: phy-names: 'oneOf' conditional failed, one must be fixed: 'p2u-0' does not match '^pcie[0-9]+$' 'p2u-0' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-1' does not match '^pcie[0-9]+$' 'p2u-1' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-2' does not match '^pcie[0-9]+$' 'p2u-2' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-3' does not match '^pcie[0-9]+$' 'p2u-3' does not match '^pcie(-?phy[0-9]*)?$' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@14180000: Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'linux,pci-domain', 'num-lanes', 'ranges', 'supports-clkreq' were unexpected) From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@14160000: phy-names: 'oneOf' conditional failed, one must be fixed: 'p2u-0' does not match '^pcie[0-9]+$' 'p2u-0' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-1' does not match '^pcie[0-9]+$' 'p2u-1' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-2' does not match '^pcie[0-9]+$' 'p2u-2' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-3' does not match '^pcie[0-9]+$' 'p2u-3' does not match '^pcie(-?phy[0-9]*)?$' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@14160000: Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'linux,pci-domain', 'num-lanes', 'num-viewport', 'ranges' were unexpected) From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@141a0000: phy-names: 'oneOf' conditional failed, one must be fixed: 'p2u-0' does not match '^pcie[0-9]+$' 'p2u-0' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-1' does not match '^pcie[0-9]+$' 'p2u-1' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-2' does not match '^pcie[0-9]+$' 'p2u-2' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-3' does not match '^pcie[0-9]+$' 'p2u-3' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-4' does not match '^pcie[0-9]+$' 'p2u-4' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-5' does not match '^pcie[0-9]+$' 'p2u-5' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-6' does not match '^pcie[0-9]+$' 'p2u-6' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-7' does not match '^pcie[0-9]+$' 'p2u-7' does not match '^pcie(-?phy[0-9]*)?$' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@141a0000: Unevaluated properties are not allowed ('num-lanes' was unexpected) From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@141a0000: phy-names: 'oneOf' conditional failed, one must be fixed: 'p2u-0' does not match '^pcie[0-9]+$' 'p2u-0' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-1' does not match '^pcie[0-9]+$' 'p2u-1' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-2' does not match '^pcie[0-9]+$' 'p2u-2' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-3' does not match '^pcie[0-9]+$' 'p2u-3' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-4' does not match '^pcie[0-9]+$' 'p2u-4' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-5' does not match '^pcie[0-9]+$' 'p2u-5' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-6' does not match '^pcie[0-9]+$' 'p2u-6' does not match '^pcie(-?phy[0-9]*)?$' 'p2u-7' does not match '^pcie[0-9]+$' 'p2u-7' does not match '^pcie(-?phy[0-9]*)?$' From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@141a0000: Unevaluated properties are not allowed ('num-lanes' was unexpected) From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Mon, Aug 22, 2022 at 04:57:24PM -0500, Rob Herring wrote: > On Mon, 22 Aug 2022 21:46:46 +0300, Serge Semin wrote: > > It's normal to have the DW PCIe RP/EP DT-nodes equipped with the explicit > > PHY phandle references. There can be up to 16 PHYs attach in accordance > > with the maximum number of supported PCIe lanes. Let's extend the common > > DW PCIe controller schema with the 'phys' and 'phy-names' properties > > definition. The PHY names are defined with the regexp pattern > > '^pcie([0-9]+|-?phy[0-9]*)?$' so to match the names currently supported by > > the DW PCIe platform drivers ("pcie": meson; "pciephy": qcom, imx6; > > "pcie-phy": uniphier, rockchip, spear13xx; "pcie": intel-gw; "pcie-phy%d": > > keystone, dra7xx; "pcie": histb, etc). Though the "pcie%d" format would > > the most preferable in this case. > > > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > > > --- > > > > Changelog v3: > > - This is a new patch unpinned from the next one: > > https://lore.kernel.org/linux-pci/20220503214638.1895-2-Sergey.Semin@baikalelectronics.ru/ > > by the Rob' request. (@Rob) > > > > Changelog v5: > > - Add a note about having line-based PHY phandles order. (@Rob) > > - Prefer 'pcie[0-9]+' PHY-names over the rest of the cases. (@Rob) > > --- > > .../bindings/pci/snps,dw-pcie-common.yaml | 19 +++++++++++++++++++ > > .../bindings/pci/snps,dw-pcie-ep.yaml | 3 +++ > > .../devicetree/bindings/pci/snps,dw-pcie.yaml | 3 +++ > > 3 files changed, 25 insertions(+) > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@14180000: phy-names: 'oneOf' conditional failed, one must be fixed: > 'p2u-0' does not match '^pcie[0-9]+$' > 'p2u-0' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-1' does not match '^pcie[0-9]+$' > 'p2u-1' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-2' does not match '^pcie[0-9]+$' > 'p2u-2' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-3' does not match '^pcie[0-9]+$' > 'p2u-3' does not match '^pcie(-?phy[0-9]*)?$' Right. I've missed the Nvidia Tegra194 phy-names. I'll mark them as deprecated too. Meanwhile @Rob could you review the rest of the series? -Sergey > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@14180000: Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'linux,pci-domain', 'num-lanes', 'ranges', 'supports-clkreq' were unexpected) > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@14160000: phy-names: 'oneOf' conditional failed, one must be fixed: > 'p2u-0' does not match '^pcie[0-9]+$' > 'p2u-0' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-1' does not match '^pcie[0-9]+$' > 'p2u-1' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-2' does not match '^pcie[0-9]+$' > 'p2u-2' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-3' does not match '^pcie[0-9]+$' > 'p2u-3' does not match '^pcie(-?phy[0-9]*)?$' > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.example.dtb: pcie@14160000: Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'interrupt-map', 'interrupt-map-mask', 'linux,pci-domain', 'num-lanes', 'num-viewport', 'ranges' were unexpected) > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@141a0000: phy-names: 'oneOf' conditional failed, one must be fixed: > 'p2u-0' does not match '^pcie[0-9]+$' > 'p2u-0' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-1' does not match '^pcie[0-9]+$' > 'p2u-1' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-2' does not match '^pcie[0-9]+$' > 'p2u-2' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-3' does not match '^pcie[0-9]+$' > 'p2u-3' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-4' does not match '^pcie[0-9]+$' > 'p2u-4' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-5' does not match '^pcie[0-9]+$' > 'p2u-5' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-6' does not match '^pcie[0-9]+$' > 'p2u-6' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-7' does not match '^pcie[0-9]+$' > 'p2u-7' does not match '^pcie(-?phy[0-9]*)?$' > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@141a0000: Unevaluated properties are not allowed ('num-lanes' was unexpected) > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@141a0000: phy-names: 'oneOf' conditional failed, one must be fixed: > 'p2u-0' does not match '^pcie[0-9]+$' > 'p2u-0' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-1' does not match '^pcie[0-9]+$' > 'p2u-1' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-2' does not match '^pcie[0-9]+$' > 'p2u-2' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-3' does not match '^pcie[0-9]+$' > 'p2u-3' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-4' does not match '^pcie[0-9]+$' > 'p2u-4' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-5' does not match '^pcie[0-9]+$' > 'p2u-5' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-6' does not match '^pcie[0-9]+$' > 'p2u-6' does not match '^pcie(-?phy[0-9]*)?$' > 'p2u-7' does not match '^pcie[0-9]+$' > 'p2u-7' does not match '^pcie(-?phy[0-9]*)?$' > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.example.dtb: pcie-ep@141a0000: Unevaluated properties are not allowed ('num-lanes' was unexpected) > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml > > doc reference errors (make refcheckdocs): > > See https://patchwork.ozlabs.org/patch/ > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. >
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml index 554c2804c608..e8d610d63ae2 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml @@ -17,6 +17,25 @@ description: select: false properties: + phys: + description: + There can be up to the number of possible lanes PHYs specified placed in + the phandle array in the line-based order. Obviously each the specified + PHYs are supposed to be able to work in the PCIe mode with a speed + implied by the DWC PCIe controller they are attached to. + minItems: 1 + maxItems: 16 + + phy-names: + minItems: 1 + maxItems: 16 + oneOf: + - items: + pattern: '^pcie[0-9]+$' + - deprecated: true + items: + pattern: '^pcie(-?phy[0-9]*)?$' + reset-gpio: deprecated: true description: diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml index 7d05dcba419b..dcd521aed213 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml @@ -52,4 +52,7 @@ examples: <0xdfc01000 0x0001000>, /* IP registers 2 */ <0xd0000000 0x2000000>; /* Configuration space */ reg-names = "dbi", "dbi2", "addr_space"; + + phys = <&pcie_phy0>, <&pcie_phy1>, <&pcie_phy2>, <&pcie_phy3>; + phy-names = "pcie0", "pcie1", "pcie2", "pcie3"; }; diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml index 3fdc80453a85..d9512f7f7124 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml @@ -70,5 +70,8 @@ examples: reset-gpios = <&port0 0 1>; + phys = <&pcie_phy>; + phy-names = "pcie"; + num-lanes = <1>; };
It's normal to have the DW PCIe RP/EP DT-nodes equipped with the explicit PHY phandle references. There can be up to 16 PHYs attach in accordance with the maximum number of supported PCIe lanes. Let's extend the common DW PCIe controller schema with the 'phys' and 'phy-names' properties definition. The PHY names are defined with the regexp pattern '^pcie([0-9]+|-?phy[0-9]*)?$' so to match the names currently supported by the DW PCIe platform drivers ("pcie": meson; "pciephy": qcom, imx6; "pcie-phy": uniphier, rockchip, spear13xx; "pcie": intel-gw; "pcie-phy%d": keystone, dra7xx; "pcie": histb, etc). Though the "pcie%d" format would the most preferable in this case. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> --- Changelog v3: - This is a new patch unpinned from the next one: https://lore.kernel.org/linux-pci/20220503214638.1895-2-Sergey.Semin@baikalelectronics.ru/ by the Rob' request. (@Rob) Changelog v5: - Add a note about having line-based PHY phandles order. (@Rob) - Prefer 'pcie[0-9]+' PHY-names over the rest of the cases. (@Rob) --- .../bindings/pci/snps,dw-pcie-common.yaml | 19 +++++++++++++++++++ .../bindings/pci/snps,dw-pcie-ep.yaml | 3 +++ .../devicetree/bindings/pci/snps,dw-pcie.yaml | 3 +++ 3 files changed, 25 insertions(+)