From patchwork Mon Nov 21 14:38:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13051154 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 857ECC433FE for ; Mon, 21 Nov 2022 14:41:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231797AbiKUOlN (ORCPT ); Mon, 21 Nov 2022 09:41:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230495AbiKUOjc (ORCPT ); Mon, 21 Nov 2022 09:39:32 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1248BC76AC; Mon, 21 Nov 2022 06:38:25 -0800 (PST) Message-ID: <20221121091328.131771866@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669041503; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=QDMaEx7ktXTUaBjXhcwy3JcriisNhamDQjdxbqkUVcQ=; b=0U8XVxBRJ8Vp/L2pbxJS5DkmJ6EglhHxDqHc/FFNSt/z9Z4FW7zwXXFTf0FPzf439iVdsB Vi/OCNdvyipjwXFMBOitBBWNy4808ajkdGXK+CmlMQuw7kBnbuIpJGqY7EbkdxiAx0EXsN py372Iz/61ExERDtt0PTJQtdf5XxwhubaqpQRjrgdY5oiWwZm9pJchwGbyyGhpXnWADmAV ywMOUCJYy5gsLM5QLXsmHabar4bF2357T7+kWqgDO+uhrdQmr0kfzZwSflaB3y1eOiUBbd xSuh9xfuF6Ktgawg/rpmL8w66w5UD91M/99IrMezDnC/70mr7YSz43WeKFR/rQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669041503; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=QDMaEx7ktXTUaBjXhcwy3JcriisNhamDQjdxbqkUVcQ=; b=+vKigeORtD6RIyVV9dLEHEachwRvpZSi1kWUpZyKjFTLZUEY67FAAdK/UDwbrEVFi9ASJr kj6KeXgh3eKjG4CQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Ashok Raj , Jon Mason , Allen Hubbe Subject: [patch V2 30/33] x86/apic/msi: Enable PCI/IMS References: <20221121083657.157152924@linutronix.de> MIME-Version: 1.0 Date: Mon, 21 Nov 2022 15:38:23 +0100 (CET) Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Enable IMS in the domain init and allocation mapping code, but do not enable it on the vector domain as discussed in various threads on LKML. The interrupt remap domains can expand this setting like they do with PCI multi MSI. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/apic/msi.c | 5 +++++ 1 file changed, 5 insertions(+) --- a/arch/x86/kernel/apic/msi.c +++ b/arch/x86/kernel/apic/msi.c @@ -184,6 +184,7 @@ static int x86_msi_prepare(struct irq_do alloc->type = X86_IRQ_ALLOC_TYPE_PCI_MSI; return 0; case DOMAIN_BUS_PCI_DEVICE_MSIX: + case DOMAIN_BUS_PCI_DEVICE_IMS: alloc->type = X86_IRQ_ALLOC_TYPE_PCI_MSIX; return 0; default: @@ -230,6 +231,10 @@ static bool x86_init_dev_msi_info(struct case DOMAIN_BUS_PCI_DEVICE_MSI: case DOMAIN_BUS_PCI_DEVICE_MSIX: break; + case DOMAIN_BUS_PCI_DEVICE_IMS: + if (!(pops->supported_flags & MSI_FLAG_PCI_IMS)) + return false; + break; default: WARN_ON_ONCE(1); return false;