From patchwork Tue Jan 24 12:47:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13114008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56441C54EED for ; Tue, 24 Jan 2023 12:47:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234002AbjAXMr3 (ORCPT ); Tue, 24 Jan 2023 07:47:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50120 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233972AbjAXMr0 (ORCPT ); Tue, 24 Jan 2023 07:47:26 -0500 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9804144BD7 for ; Tue, 24 Jan 2023 04:47:25 -0800 (PST) Received: by mail-wr1-x431.google.com with SMTP id b7so13773880wrt.3 for ; Tue, 24 Jan 2023 04:47:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JOLdX2IXRYTY20PyypvesYgDylYTyEHt8E13Ale0psg=; b=oxspeLDR04fqlrwSXywsGdmEyJeGSm2u2YCoo3GXNTKRJhQRsjQJnOrGDuYF3yiGEU MGBonIdq0ztoEQ35WwCJ9dZQ4pXMn9snl/yrMu39PWKMdbLRHfB4IullJJZKhciGyTG+ xWa5FA0FFN88PgKuexOQi19d0sYtwNI3DbZG3nWXKwRCgKNIaSIhhF8DDW52R75CFvWz /csSoJEEoc1z28nmHQq1nEfMa/tqFKRoafQ9Q5pYgKsk2AV4/9EpN8lsA5i85IAPkaV/ pYBCDWDJ2PPqL3IWpYQnrXU1uGeCRv+tTuKMC20vUPk/ZWNK7DZ48f9MexXeqqwiMUVU 7K3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JOLdX2IXRYTY20PyypvesYgDylYTyEHt8E13Ale0psg=; b=X8qsd2c1UKdaypd29sy0TYGT6CgWTv0UuV84PMcEK9i2sdF/1k6JfAyoa8tpRwxXeW eeh98cWFNxRKqRL7XIJ1JgY8/rKtzdWBy+UZsGS/IAO/SMo8jMDJ5Ulavy1CR+5waEb7 zK6OfynPQH8StSFxRJE36BMNrPDZucf8PYwG3t8DUEn1pdM3fWm6guOqkWMJcZLh2v5Q SZXsTsh0VUaerBgxs+xo4NJzo5FW+MIHSOMhZI+eCfzyTViUvrypZElbo+hbW1kRP+N7 l6eVSNKuIXx8IW64Z5RunzIPd9ZbT/Td+DdmXU8i5JR1dta/kPE00+hfVe990vBuO8wk BZkw== X-Gm-Message-State: AFqh2krh1ih9ZJBafP817Cg51gLD8Lus4fE6Zfq8iizgfePfmySqvt4E LDJgKJpIKNX2f2os9QRm9m6Zbg== X-Google-Smtp-Source: AMrXdXvvRscGs12UD+a6fDNv9NbNKbc//UYfn5z3qtzp1W1rYe0btKKDyr3kKlMo5NrQXeQQzUDXXQ== X-Received: by 2002:a05:6000:1049:b0:242:15d6:1a75 with SMTP id c9-20020a056000104900b0024215d61a75mr22177709wrx.66.1674564444108; Tue, 24 Jan 2023 04:47:24 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id a5-20020a5d5705000000b002bdbde1d3absm1766840wrv.78.2023.01.24.04.47.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jan 2023 04:47:23 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , "vkoul@kernel.org" , Kishon Vijay Abraham I , Manivannan Sadhasivam , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , linux-phy@lists.infradead.org, Dmitry Baryshkov Subject: [PATCH v5 02/12] phy: qcom-qmp: pcs: Add v6 register offsets Date: Tue, 24 Jan 2023 14:47:04 +0200 Message-Id: <20230124124714.3087948-3-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230124124714.3087948-1-abel.vesa@linaro.org> References: <20230124124714.3087948-1-abel.vesa@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new PCS offsets in a dedicated header file. Signed-off-by: Abel Vesa Reviewed-by: Dmitry Baryshkov --- This patchset relies on the following patchset: https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/ The v4 of this patch is: https://lore.kernel.org/all/20230119140453.3942340-3-abel.vesa@linaro.org/ Changes since v4: * none Changes since v3: * added Dmitry's R-b tag Changes since v2: * none Changes since v1: * split all the offsets into separate patches, like Vinod suggested drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 16 ++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp.h | 2 ++ 2 files changed, 18 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h new file mode 100644 index 000000000000..18c4a3abe590 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_V6_H_ +#define QCOM_PHY_QMP_PCS_V6_H_ + +/* Only for QMP V6 PHY - USB/PCIe PCS registers */ +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc +#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198 +#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 + +#endif diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index a63a691b8372..80e3b5c860b6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -38,6 +38,8 @@ #include "phy-qcom-qmp-pcs-v5_20.h" +#include "phy-qcom-qmp-pcs-v6.h" + /* Only for QMP V3 & V4 PHY - DP COM registers */ #define QPHY_V3_DP_COM_PHY_MODE_CTRL 0x00 #define QPHY_V3_DP_COM_SW_RESET 0x04