From patchwork Thu Mar 30 08:53:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 13193683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99D9DC761AF for ; Thu, 30 Mar 2023 08:54:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229950AbjC3IyZ (ORCPT ); Thu, 30 Mar 2023 04:54:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229961AbjC3IyV (ORCPT ); Thu, 30 Mar 2023 04:54:21 -0400 Received: from esa2.hgst.iphmx.com (esa2.hgst.iphmx.com [68.232.143.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35A326EA5 for ; Thu, 30 Mar 2023 01:54:18 -0700 (PDT) DKIM-Signature: v=1; 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s=dkim; t=1680166456; x=1682758457; bh=hccwggJJwzfgdDztJN Fo5zJ5OiRPzd+iDuSC1/Wq8lQ=; b=aPNl9TZPNnyqrAj12LVLli8oq5J15uw6Vy xbiI2sjRMx8vg8tWys1428UIG0P5GrhSUSAxP7uZIOuTbYLVyr/fxmwAEt07GjS5 NeoATS5YmFJB2rr202CNWj0wZKELUrj1/IzMphyGiNJmEIEfefDflU9Pj5M4of3S bCPPZHUcFV8zrYdh63NqeRUzTQFkbGUFdy+dVgim6vz9Rz4M/XIqTtxi5BE+sAFQ PAs8BbA12wUR6/EoeqRNq1lAEqQkZNtLpeHchHlLAL7b3hOizc4BPf0YNZEO1Tx9 qzp4yMAKXlXW37ck4ht28LYEx4gq0rEIiHqZ6tcgZ40SkDLW8afA== X-Virus-Scanned: amavisd-new at usg-ed-osssrv.wdc.com Received: from usg-ed-osssrv.wdc.com ([127.0.0.1]) by usg-ed-osssrv.wdc.com (usg-ed-osssrv.wdc.com [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id ABqGDr16b0YR for ; Thu, 30 Mar 2023 01:54:16 -0700 (PDT) Received: from washi.fujisawa.hgst.com (washi.fujisawa.hgst.com [10.149.53.254]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4PnHKM1jPHz1RtVn; Thu, 30 Mar 2023 01:54:14 -0700 (PDT) From: Damien Le Moal To: Bjorn Helgaas , linux-pci@vger.kernel.org Cc: Rick Wertenbroek , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Manivannan Sadhasivam , Kishon Vijay Abraham I , Arnd Bergmann , Greg Kroah-Hartman Subject: [PATCH v4 09/17] PCI: epf-test: Improve handling of command and status registers Date: Thu, 30 Mar 2023 17:53:49 +0900 Message-Id: <20230330085357.2653599-10-damien.lemoal@opensource.wdc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230330085357.2653599-1-damien.lemoal@opensource.wdc.com> References: <20230330085357.2653599-1-damien.lemoal@opensource.wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The pci-epf-test driver uses the test register bar memory directly to get and execute a test registers set by the RC side and defined using a struct pci_epf_test_reg. This direct use relies on a casts of the register bar to get a pointer to a struct pci_epf_test_reg to execute the test case and sending back the test result through the status field of struct pci_epf_test_reg. In practice, the status field is always updated before an interrupt is raised in pci_epf_test_raise_irq(), to ensure that the RC side sees the updated status when receiving the interrupts. However, such cast-based direct access does not ensure that changes to the status register make it to memory, and so visible to the host, before an interrupt is raised, thus potentially resulting in the RC host not seeing the correct status result for a test. Avoid this potential problem by using READ_ONCE()/WRITE_ONCE() when accessing the command and status fields of a pci_epf_test_reg structure. This ensure that a test start (pci_epf_test_cmd_handler() function) and completion (with the function pci_epf_test_raise_irq()) achive a correct synchronization with the host side mmio register accesses. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Damien Le Moal --- drivers/pci/endpoint/functions/pci-epf-test.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index ee90ba3a957b..fa48e9b3c393 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -613,9 +613,14 @@ static void pci_epf_test_raise_irq(struct pci_epf_test *epf_test, struct pci_epf *epf = epf_test->epf; struct device *dev = &epf->dev; struct pci_epc *epc = epf->epc; + u32 status = reg->status | STATUS_IRQ_RAISED; int count; - reg->status |= STATUS_IRQ_RAISED; + /* + * Set the status before raising the IRQ to ensure that the host sees + * the updated value when it gets the IRQ. + */ + WRITE_ONCE(reg->status, status); switch (reg->irq_type) { case IRQ_TYPE_LEGACY: @@ -659,12 +664,12 @@ static void pci_epf_test_cmd_handler(struct work_struct *work) enum pci_barno test_reg_bar = epf_test->test_reg_bar; struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar]; - command = reg->command; + command = READ_ONCE(reg->command); if (!command) goto reset_handler; - reg->command = 0; - reg->status = 0; + WRITE_ONCE(reg->command, 0); + WRITE_ONCE(reg->status, 0); if (reg->irq_type > IRQ_TYPE_MSIX) { dev_err(dev, "Failed to detect IRQ type\n");